Resolved! SDMMC - [STM32CubeF7][1.1x.0][stm32f7xx_hal_sd] SDMMC / DMA IRQ handlers data race
Usecase:Using the SDMMC module with DMA in HS mode (clock bypass @48MHz following CMD6 switch CMD), the SDMMC_IT_DTIMEOUT interrupt is raised when waiting few dozen of seconds after last successful data transfer (FATFS f_read in this case).The HAL_SD...