We are pleased to announce you that the official release of STM32CubeMX V6.12.0 is available. What is new in STM32CubeMX V6.12.0?New MCUs/MPUs series : STM32WB0 ,STM32MP25XX and STM32C071XXAdd support new CPNs STM32G4: Add support STM32G4 'Z’ and STM...
If I tick the enable box in STM32CUBEMX the interrupt is enabled when MX_GPIO_Init() is executed. Since this is prior to the initialisation of FreeRTOS queues etc this turns into a disastrous mess.If I leave the box unticked then everything assoociat...
In STM32G030, PA6 can be configured as PWM Output of Timer 16. What I want is to initialize the pin in analog mode (High Impedance) and when I want to use the PWM, then switch the configuration to timer channel. I think this could be better done writ...
Hi,I am a newbie on microcontroller but, I can read / write on the GPIO port and control a servo motor in PWM with a timer.Now, I am starting to play around with ST BLE for control the GPIO port and servo motor.I use: Nucleo-F401RE X-NUCLEO-IDB05A1 ...
If from the "Clock Configuration" tab Fadc > 36Mhz then the Clock prescaler for the ADC is automatically set to /2 where the /1 is diabled. For > 72MHz it is /4 where /1 and /2 are disabled. Rev. 2 has an additional /2 divider that has been taken int...
The STM32F103 does not have a Synchronous Prescaler. and the Asynchronous Prescaler can be set to (2^20 - 1) in the MCU.But STM32CubeMX doesn't allow a number higher than 127. Not really a problem of course, just a bit confusing.
Hey everyone,i need to find the app_conf.h somwhere but i cant see where. maybe that you guys can help me out??thanks for lookingbye.
With previous version it was working perfectly but new version has a message as: The code is generated succesfully under 'my destination' but MDK-ARM V5 project generation have a problem
I have setup on cubeMX (STM32F302R8 Nucleo board) version 6.0.1 USART1 to use DMA on TX.I use LL driver for usart.The generated code is the following : /* USART1_TX Init */ LL_DMA_SetDataTransferDirection(DMA1, LL_DMA_CHANNEL_4, LL_DMA_DIRECTION_M...