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Posted on July 23, 2013 at 08:01Hi all,I'd like to implement a nonblocking version of the sdio driver. I'm using the stm2310e eval kit. The sdio driver provided uses a busy wait. Is it possible to modify this into a queue based nonblocking version? ...
Posted on July 22, 2013 at 11:49Hello I am facing problem to download st-link/v2 for stm32f3 discovery for linux.plz guide me or give me some links realted to that.
Posted on July 23, 2013 at 15:03In the summary for the STM32F050C4 device (and also for other STM32F0 devices, e. g. STM32F030), I find the statement: ''4 Kbytes of SRAM with HW parity checking'' This term also appears in the summary list at the be...
Posted on May 13, 2013 at 23:27 Hi, I am trying to interface the STM32F4Discovery board with an external A/D-converter. The A/D generates a GPIO interrupt as soon as the data is sampled and ready to be retrieved. After that 3 * 8 bytes h...
Posted on July 22, 2013 at 18:50Hello all,After toiling with the stlink v2 for awhile I've finally caved and decided to try my luck here. The issue is that I've attached the st link SWDIO, SWDCLK, GND, and VDD on the evaluation board. I installed ...
Posted on July 23, 2013 at 12:36Hello,I have purchased STM32L discovery and installed the Atollic TrueStudio development environment on Windows XP.I successfully loaded the sample application such that the green LED light flashes and the blue LED is...
Posted on July 23, 2013 at 12:41hi, did anbyody try to implement tickless idle mode from Freertos on STM32? I'm currently working on it, but I can't deal with it. I try to take advantage from tickless demo for SAM4L from FreeRTOS website. I implemen...
Posted on July 22, 2013 at 09:34RM031615 Operational amplifier (OPAMP)Table 54. Connections with dedicated I/OOPAMP1 inverting input: PA3 (VM0) PC5 (VM1)15.4 OPAMP registers15.4.1 OPAMP1 control register (OPAMP1_CSR)Bit 8 VMS_SEL:0: PC5 (VM0) used ...
Posted on July 22, 2013 at 04:59I'm using a SRAM and 74LVC138 for addressing external IOs in address 80000H. The code example works well with SRAM, but I can not access the IOs. The pin A19 seems to be dead when I try to write at address 80000H. Tha...
Posted on July 22, 2013 at 04:34The datasheet for 'F103F,G parts show additional timers, e.g. TIM11, not present on the earlier parts, e.g. 'F103RB. Where is documentation that specifies the IRQ number for these timers? The datasheet says the NVIC ...
