Ask questions, find answers, and share insights on STM32 products and their technical features.
Posted on April 12, 2016 at 08:56We're using the STM32CubeExpansion_BLE1_V2.5.2 on a STM32L4-Nucleo + BlueNRG-Expansion. It comes with low power manager drivers. The STM32L4 switches between RUN and STOP mode every ~ 1 sec. It uses RTC wakeup timer ...
Posted on April 09, 2016 at 22:47I'm designing a product that uses the STM32F446. The reference manual states that Vcap is increased to 4.7uF (from 2.2uF for the F405) on page 15 and later on page 72 (power supply scheme) it lists 2 x 2.2uF caps on ...
Posted on April 11, 2016 at 10:26I would like to create a 16 bit DAC in STM32F103RET6. ButSTM32F103RET6 only has 12 bit DAC. How do I implement a higher resolution DAC in STM32F103RET6?Thank you. Please see link belowhttps://www.google.com/url?sa=t&...
Posted on April 10, 2016 at 19:56Hello Community,I am currently trying to get my head around the LIS3DSH accelerometer using the I2C HAL library, however I am having a great deal off difficulty in achieving anything.My aim is to simply read the axes...
Posted on April 11, 2016 at 17:08I'm currently having some issues with the USB core on the STM32f4. Before enabling the USB core the VBUS line (GPIO A9) is low as would be expected. when a usb cable is plugged it I detect this and enable my USB core...
Posted on April 11, 2016 at 09:39Hi, I would like to configure a timer as a slave in gated mode which has an external clock from another timer. So in my setup I do would have three timers. A ''clock timer'' which outputs a given clock frequency, a m...
Posted on November 24, 2015 at 09:02 Hello! I'm developing an application which requires the heap to be located in a 32MB off-chip SDRAM. I'm using Keil RTX in the project.The problem is the application falls when a function malloc() is ca...
Posted on April 08, 2016 at 10:34Hi Group,Is it possible to disable the Reset pin on this micro for a time interval so that any external reset pulse don't have any effect during this time?Kind RegardsBob
Posted on April 08, 2016 at 18:43Hello,i'm using a STM32F051 and i want to know if the reset is a watch dog reset or not.I read the flag IWDGRSTF in the CSR register (RCC peripheral) but this bit is always set when a reset occurs.I tried with no wat...
Posted on April 11, 2016 at 11:00Hello, dears!I'm stucking around interfacing the NAND to STM32F746The nand is (NAND512W3A2CN6)Thus we have 512 bytes (0.5 kBytes) per Pagebut in the HAL drivers description we can see:PageSize - NAND memory page (wi...
