Combination of PLL PREDIV and MUL factors when some frequency is desired
Posted on September 25, 2016 at 10:27Hi.I have to reduce system clock from 72 MHz to 48 MHz. Input frequency is 16 MHz from external oscillator. I could achieve 48 MHz in two ways:1. With PLL PREDIV = 2 and PLL MUL = 6 or2. with PLL PREDIV = 1 and P...