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Posted on August 05, 2016 at 06:07This is an STM32CubeMX 4.16.0 generated project. The STM32CubeMX project file is attached. The processor is an STM32F373VCT6 I have a Hard Fault. Below is the call stack and register contents when the Hard Fault ha...
Posted on July 25, 2016 at 08:42Hello, We are using STM32l476 uC with Jlink segger debugger, and trying to print logs through ITM to Segger J-Link SWO Viewer , the 48 MHz HSE clock is being used as sysclk with RCC_PLL_NONE, We are using ITM_SendCh...
Posted on August 04, 2016 at 14:50Hi y'alldoes any one know the difference between STM32F429i-DISCO & STM32F429i-DISC1 that may be causing the issue I have & how to get around it ?basically I've been using a STM32F429i-DISCO to build a demo unit for...
Posted on August 05, 2016 at 12:06Hi, I have a problem when you use the microcontroller STM32F746(NUCLEO-F746ZG) FMC together with the NAND memory K9F1G08U0E. The documentation states that it is sufficient to read the data at the address 0x8000000...
Posted on August 05, 2016 at 00:16We have had an odd problem with using pin PC13 as an output GPIO (for active-low chip-select of a bit-banged SPI). (PC13 is not defined as a GPIO_EXTI13.) We found that controlling this GPIO somehow leads to USB (...
Posted on August 05, 2016 at 10:53hi,I just found that clock devider not work for some Frequency, for example if PLL is used without divider, Timer clock cant be devided. EnjoyAll the best, #stm32 #timer #interrupt
Posted on August 03, 2016 at 08:43Hello, can someone to explain to me what happen when you use 8 channels on ADC, and use DMA. How DMA take ready sample from data register. I think when first channel is ready, dma take it first, after that second, t...
Posted on August 05, 2016 at 09:21I noticed a mistake in the structure of the PM0056 document (rev. 5) : The Branch an Control instructions subsubsection (3.8.4, p 91) should be a different subsection. The B, CBZ, etc. are parts of it. #stm32-doc...
Posted on August 04, 2016 at 14:19Hi,I am trying to run my system at 4 MHz SYSCLK having PLLCLK as source.PLL has MSI as Source configured at 4 MHz.This configuration is done in SystemClock_Config() in main().Now, I am trying to re-configure the clo...
Posted on July 31, 2016 at 16:04 I've been struggling with this problem for weeks now. Basically I am trying to read out a sensor via I2C. The L3SD I am reading out the sensor in FreeRTOS, but the sensor readout task has the highest priority of a...
