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I have come across some unreliable behaviour with SPI, when having i-cache & d-cache enabled. Are there any known issues with i-cache & d-cache on these controllers?Recently, while going through "ChibiOs" repository i found below comment which points...
Hello.Can I implament SPI protocol on STM32L476RG board?I searched for a SPI library but could not find it.If I can, so how to do this?Thanks
When for ADC2 Channel 18 is selected as Injected Channel and initialized via “HAL_ADCEx_InjectedConfigChannel�? it will return HAL_ERROR.When no other ADC it will fail in line 2288 2286*. When another ADC is enabled it will fail in line 2277 2275*.HA...
I have the same code that I want to run in several different configurations. I have banked memory. The code will be run from both banks. In order to run the code from bank 2, the VTOR register needs to be set to the IVT address in the second bank. Si...
I have STM32F446RE which is 180 Mhz, APB1 is running at 90 Mhz which is the timer clockfor prescaler 7 it is 1.04 Mhz6 is 1.19 Mhz8 is 922 KhzI would assume that I could divide 90 Mhz by 90 to get nice 1 Mhz but it does not seem to be the case. I won...
Hi,How to calibrate the adc... I am using Nucleo H743 and my H753 boards. Vref is 3.32V in nucleo, and 3.31V in my board.. when i convert the adc value by simply multiplying with Vre/65536, the result is almost greater than 11.mV (for Vin> 1.0000V) ...
While stm32l4r and stm32h7 have DMA1MUXEN and DMAMUX1RST in the RCC register space, I see no such definitions in STM32G0. Are these definitions missing in the headers or is there really no such functionality in STM32G0
In Single SPI mode, the unused qspi pins are held as follows: IO2 is in output mode and forced to ‘0’ (to deactivate the “write protect�? function) IO3 is in output mode and forced to ‘1’ (to deactivate the “hold�? function)Problem is, all the flash ...
Hi all,I do have a problem with I2C slave transmit mode. Everytime the master (in my case an FTDI FT4222) starts a read access I get the error ACKNOLEDGE FAILURE.If I just transmit from a PC to the STM32 everything works fine and I receive the correc...
Hi,I want to configure the DMA so that it transfers data from the GPIO lines (8 bit data lines) to the RAM buffer upon receiving a trigger signal on the timer capture input channel TIM1_CHI (PE9) . I am using stm32f446ze.We nees to acquire data regi...
