We are pleased to announce you that the official release of STM32CubeMX V6.12.0 is available. What is new in STM32CubeMX V6.12.0?New MCUs/MPUs series : STM32WB0 ,STM32MP25XX and STM32C071XXAdd support new CPNs STM32G4: Add support STM32G4 'Z’ and STM...
The function LL_CRS_ConfigSynchronization uses:MODIFY_REG(CRS->CR, CRS_CR_TRIM, HSI48CalibrationValue) ;But the delaration of LL_CRS_HSI48CALIBRATION_DEFAULT is:#define LL_CRS_HSI48CALIBRATION_DEFAULT ((uint32_t)0x40U)So the calibration value is set...
I am using STM32CubeIDE to build a freeRTOS project. I have put my tasks in their own .h and .c files. For example I have a default_task.c file. The problem is each time I open CubeMX and save my changes, the 'auto code update' feature does not se...
I have an STM32F7 which I have configured RCC's HSE and LSE as Crystal Resonator and am using HSE as a clock source for my project PLL Source Mux and PLLCLK for System Clock Mux. The RCC configuration does show conflict warnings at Master Clock Outpu...
Hi,I have created project using the STM32CubeIDE with .ioc. And added new folder for application code. Problem statement: Any API defined in my application file which under the Application folder will not identified by the Core files.I have defined t...
We have project for STM32F405 configured and code generated with STM32Cube 5.x.x.x.After installing Version 6.0.0.0 and when project was migrated to STM32Cube Version 6.0.0.0 and code regenerated, all IRQ priorities for peripherals (UART, SPIs, I2C, ...
I reckon that users should set the ideal value of ARR and PSC, not ARR-1 and PSC-1. Because ST should do this job in the program.
I can't find a summary of the colors used in CubeIDE Pinout View. What is the meaning of these different colors?Thanks,
I am trying to configure the Internal Flash (0x08000000, 128KB, cacheable), DTCM RAM (0x20000000, 128KB, non-cacheable), AXI SRAM (0x24000000, 512KB, cacheable), and QSPI (0x90000000, 4MB, cacheable).There is no indication of what parameters might be...
Hi there!I am trying to create a lock-step synchronization between a timer that updates GPIO and a dac.As you can see from the below, the GPIO leads the DAC transitions by 1 cycle, and that's not what I want: My setup is as follows.TIM8 generates a T...
H723ZGT6 Nucleo-144CubeMX 6.3.0AN209, Summer 2017, V 5.0An error occurred when writing a for loop process before SDRAM initialization.I know the solution, but I don't know why this is happening.(Add static or volatile or write a for loop after SDRAM ...
