STM32CubeMX (MCUs)

Ask questions on STM32CubeMX. Discuss code generation and configuration challenges, among other topics.

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STM32CubeMX 6.15.0 released

We are pleased to announce that the version 6.15.0 of STM32CubeMX is available. What is new in 6.15.0: Enhanced microprocessor support: Added the STM32MP21-A35-TD, STM32MP21-M33-TD, STM32MP25-M33-TD, and STM32MP23-M33-TD trusted domains for the STM32...

Resolved! CubeMX BUG: Setting LSE Drive Capability

Posted on October 17, 2017 at 12:08When using CubeMX, with STM32L476, for setting LSE drive capability other than 'Low Drive' the setting will not be implemented. This is due to the fact that the write access using bit DBP in PWR->CR1 is not set pri...

Feature Request - Pin selection - CubeMx

Hello,When a user adds a peripheral (for example I2c),  CubeMx picks some default and/or available pins for the device.It would be really nice if CubeMX can list all the Alternative pins that this peripheral can use.  So by right clicking on "I2C_SCL...

mattcrc_0-1741334003863.png
matt-crc by Senior II
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MX 6.14 SAI on STM32H3B3I_eval

HII just upgraded MX 6.14The SAI configuration panel fail to load, all other configurations panel are available. The existing SAI configuration is not changed but MX. It also report an error before the code generation for SAI not correctly configured...

RGrasse by Associate
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CubeMX disable DCache not working properly. BUG

 When DCache is disabled, CubeMX still generates this:#define __DCACHE_PRESENT 1U /*!< CM7 data cache present */If you comment out this line, CubeMX will uncomment it, causing some peripherals to fail.Using 6.14 and the STM32H743 cpu.