STM32CubeMX (MCUs)

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STM32CubeMX 6.13.0 released

We are pleased to announce to you that the release 6.13.0 of STM32CubeMX is available. What is new in 6.13.0: Added support for the following series, microcontrollers and microprocessors: STM32N6, STM32U3, STM32WL3x, STM32G411xx and STM32C0Added the ...

Resolved! How do you disable ADC DMA interrupts in cubeMX?

For some reason, CubeMX won't let me disable the DMA IRQ in the ADC configuration panel. The ability to deactivate ISR is important when the ADC is configured in continuous mode.Because my ADC conversion is small, the ISR are generated at a very high...

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GBert.2 by Senior
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  • 4 replies
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Resolved! STM32CubeMX ADC Rank.1 missing

Posted on January 20, 2017 at 02:29I don't know what i did... but my Rank1 is gone in ADC 1 & 2 ??I have 4 input i want to sample... If i configure a new project.. i get all 4, but not in this one :-SClues or bug ??/MAnd now where i just got my ADC-...

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mh by Associate II
  • 1972 Views
  • 9 replies
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Resolved! Implicit declaration of MX_SPI3_Init after CubeMX migration

HelloI'm using STM32cubeIDE with an L431RCCubeMX invited me to migrate my .ioc from 6.2 to 6.4 and FW_L4 from 1.17 to 1.17.1After that I have a warning Implicit declaration of MX_SPI3_Init in main.cThis is only in cubeMX generated codeFor information...

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po221 by Senior
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  • 6 replies
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Resolved! Need help to understand relationship of USART1 (as a source of interrupts), EXTI (as an enabler of external interrupts), and NVIC. USART1 RXNE=1 with RXNEIE=1 does not cause interrupt.

(BACKGROUND) I'm working on small (GCC/C-language) tests of STM32F051 with STM32CubeIde 1.8.0 on STM32F051 target. These tests are being done ---> without HAL, Lower Level drivers, but am using #include "cmsis_gcc.h" to access CPU interrupt enable/di...

wb0gaz by Senior
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  • 13 replies
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