Forum Posts
I am using lis2dw12 on a congnitect chip with linux. How can I set register via sysfs for this device ?
I am using lis2dw12 on congnitec board on linux. lis2dw12 is enumerated only as iio device as I do not configure spidev. I have to configure the interrupts 0x3F , CTL_1. How can I set this from sysfs interface ?
What's the best way to complete self-test on ASM330LHH?
I have followed the description in <an5296-asm330lhh-automotive-inertial-module-digital-3d-accelerometer-and-digital-3d-gyroscope-stmicroelectronics.pdf> to write self-test code, but the Accelerometer and Gyroscope's data is still not in the correct...
X-nucleo-VL53L8A1 not working with nucleo-f401re and GUI
X-nucleo-VL53L8A1 not working with nucleo-f401re and GUI,when i connect vl53l8 expansion on Nucleo-f401re ---LD1 blinks red and green...also com port shows in device manager but vl53l8 GUI does not show/detect com port
[LSM6DSR] Correct flow to get XL and gyro data by data-ready interrupt mode?
I tried to get XL and gyro data by data-ready interrupt mode,1. Configuartion registers sequence and values are as follows Use Bypass mode, XL data-ready rounted to INT1; gyro data-ready rounted to INT22. In ISR1 reads the STATUS_REG, if XLDA bit is...
VL6180X library's registers
Hi! I'm using the VL6180X with several libraries for a specific application. However, I have noticed that most of them configure some registers that are not detailed in the manufacturer's datasheet. Therefore, I would like to know what these register...
Resolved! LSM6DSR Gyro Zero Offset?
Dear Sir,In datasheet, it says that Angular rate zero-rate level is +/- 1dps,does it means that when the chip soldered on PCB and in flat stationary state, the expected value is +/- 1dps or close to +/- 15 counts for +/-2000dps scale?What is the min ...
VD56G3 programmers guide? Is this availible? Also the hardware interface description documentation? Also, is there a dev kit availible for this? Thanks in Advance!
We need a hardware interface doc and programmers guide. Alos a pointer to where we can get a dev kit for this part.
Synchronizing Two IIS3DWB Units + Understanding the Determinism of IIS3DWB Timing
I'm currently investigating mechanisms for synchronization of disparate IIS3DWB units in a given system. The current thought is that signal alignment between two disparate IIS3DWB units can be achieved without a traditional SYNC signal by aligning to...
