STM32 MCUs Wireless

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Board resets systematically from standby mode

Hello,I would like to reach the lowest consumption as possible. I am programming an end node which sends data through TTN. My project is based on the LoRaWAN End Node example with the LoRaWAN middleware. My fimrware works like that :at boot, the boar...

nogema by Associate II
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IWDG in STOP2

I'm using MCU STM32WB55CE. The issue is the following:after putting MCU in STOP mode it looks like IWDG still running and reset the MCU.Option byte: 0x3B79F1AA, means bit IWDG_STDBY and IWDG_STOP clear.I'm using SEGGER J-Link for debugging. Ble stack...

IHlot.1 by Associate II
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I have problem with UsageFault_Handler occurance. I have build beacon project that is advertising adc data every second and then go to sleep mode. After some time processor stop and go to fault. It happens random time after start. When go to sleep mode

is disabled problem dissappear. When fault accured thread shows 0x2, 0xffffffe9, 0xf000af00, adresses jumps. Fault Analyze tool shows sp (MSP) at 0x2002ff30, pc at 0x2, xpsr at 0x2, r1-r3 at 0x2, r12 at 0x3, mmfar at 0xe00, usage fault details attemt...

KPrzy.1 by Associate II
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  • 2 replies
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Resolved! STM32WB55 Shutdown mode

Ciao,I am trying to put my STM32wb55 in shutdown mode and wake it up using 2 external pins.Wake-up sources are on PA0 (active high) and PC12 (active low). Those should be PIN1 and PIN3 wake-up sources.This is the code I use to put the device in shutd...

VM by Associate
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  • 2 replies
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Save energy with CPU2 in iddle mode on STM32WB10

I am a new developer on STM32WB10 and I do not succeed to  drastically decrease power consumption in standby mode. Commands for main CPU in order to lower consumption seems to be OK but the CPU2 for BLE seems to be always active.LL_C2_PWR_SetPowerMod...

SMPS - Danger the device may be destroyed

Hi all,I read this advertising in the datasheet:<<The SMPS needs a clock to be functional. If for any reason this clock stops, the device maybe destroyed.[...]Danger: Before enabling the SMPS, the SMPS clock detection must be enabled in the sub-GHz r...