STM32 MCUs Embedded software

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ETH_DMACSR_RBU error occurs and stalls the Ethernet receive on STM32H7. Is there a way around this issue with the DMA?

Hi, I've been using the STM32H7 example which uses the new reworked Ethernet driver (https://github.com/STMicroelectronics/STM32CubeH7). Changed the application layer of the example (LwIP_HTTP_Server_Netconn_RTOS) and during larger transfers, the DMA...

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Ethernet communication - mx_lwip_process() how often

Hi everyone,I am using STM32f429, and I am using Ethernet communication.Inside the while(1) has the mx_lwip_process() function and I am using the function every while, and I found this function takes a lot of time, so I would like to know how often I...

ACohe.3 by Associate II
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ethernetif_set_link thread is not running. I would like to detect link up or down. I am using STM32F429ZIT6 - Nucleo, FreeRTOS CMSIS v1, LWIP v2.1.2 I am able to break in "tcpip_thread" so I assume it's not a scheduler issue. Anybody has an Idea?

int main(void) { /* USER CODE BEGIN 1 */   /* USER CODE END 1 */   /* MCU Configuration--------------------------------------------------------*/   /* Reset of all peripherals, Initializes the Flash interface and the Systick. */ HAL_Init();...

DPatr.2 by Associate III
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Using DAC1_2 with SDRAM and HS USB PHY

Is this possible - even in a hacky way.the OPAMP2_VOUT (PE7 follower) output clashes with FMC_D4+the DAC1_OUT2 pin (PA5) clashes with USB HS ULPI CKSo is any configuration possible where DAC1_2, USB HS and SDRAM can work together?

Resolved! Can I use backup registers when RTC is disabled?

I need the RTC module to be enabled in order to write to & read from backup registers on STM32F401 using these functions:void HAL_RTCEx_BKUPWrite(RTC_HandleTypeDef *hrtc, uint32_t BackupRegister, uint32_t Data) uint32_t HAL_RTCEx_BKUPRead(RTC_HandleT...

MZadn.2 by Associate II
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  • 6 replies
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Using bootloader GO command with BOOT0 always asserted

I am using the I2C bootloader on STM32L431, in a system where another host CPU exists. I would like to minimize the number of host GPIO needed to manage entry to bootloader mode. (Currently the host is controlling the BOOT0 and RST# pins). I would...

BK1 by Associate
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  • 1 replies
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Will I be impacted by Azure TLS Critical changes ?

Hello everyone, I just have seen information from Azure about TLS Certificate critical changes : https://techcommunity.microsoft.com/t5/internet-of-things-blog/azure-iot-tls-critical-changes-are-almost-here-and-why-you/ba-p/2393169I am using x-cube-c...

NCatt.1 by Associate III
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