When enabled Data cache for example in main:/* Enable D-Cache---------------------------------------------------------*/ SCB_EnableDCache();I think I am supposed to uncomment L63 in sd_diskio.c to activate Cache maintenance:/* USER CODE BEGIN enabl...
Hi, I've been using the STM32H7 example which uses the new reworked Ethernet driver (https://github.com/STMicroelectronics/STM32CubeH7). Changed the application layer of the example (LwIP_HTTP_Server_Netconn_RTOS) and during larger transfers, the DMA...
Hi everyone,I am using STM32f429, and I am using Ethernet communication.Inside the while(1) has the mx_lwip_process() function and I am using the function every while, and I found this function takes a lot of time, so I would like to know how often I...
int main(void) { /* USER CODE BEGIN 1 */ /* USER CODE END 1 */ /* MCU Configuration--------------------------------------------------------*/ /* Reset of all peripherals, Initializes the Flash interface and the Systick. */ HAL_Init();...
Is this possible - even in a hacky way.the OPAMP2_VOUT (PE7 follower) output clashes with FMC_D4+the DAC1_OUT2 pin (PA5) clashes with USB HS ULPI CKSo is any configuration possible where DAC1_2, USB HS and SDRAM can work together?
I need the RTC module to be enabled in order to write to & read from backup registers on STM32F401 using these functions:void HAL_RTCEx_BKUPWrite(RTC_HandleTypeDef *hrtc, uint32_t BackupRegister, uint32_t Data) uint32_t HAL_RTCEx_BKUPRead(RTC_HandleT...
STM32H747-Disco, Cube IDE 1.10.1I've designed a UI using the method of MPV a few times in the past using one processor(CM7). Now, I'm using CM4 for sd card and PWM, I can't seem to get the model.cpp to recognize TIM1 handler (htmi1). I had made a s...
Hi,I'm using the NUCLEO-64 STM32L476RG and I am aware that it is very simple to start the ADC to get a reading in an analog port. One should however wait for the conversion to complete and the HAL library has the HAL_ADC_PollForConversion() function ...
I am using the I2C bootloader on STM32L431, in a system where another host CPU exists. I would like to minimize the number of host GPIO needed to manage entry to bootloader mode. (Currently the host is controlling the BOOT0 and RST# pins). I would...
The function LL_ADC_SetChannelSingleDiff() in stm32l4xx_ll_adc.h relies onshifting a 32 bit value 32 postions in order to clear a bit field.Shifting a word with >= the word size is undefined in the C standard and this generates erronous code when com...
