Dear friends,I am facing one issue with FOTA on Azure platform.We are trying with evaluation kit (B-L475-IOT01A2)The errors seen are Download FOTA from: HostName=[stm32blob.blob.core.windows.net] Type=[Secure] port=[443] File=[/firmware-nucleo/Azur...
Have read about the ORE interrupt problem on STM32F7.On STM32H7 it looks like the overflow condition prevents setting RNE flag, even in polling mode, without any involvement of interrupts.With the current H7 HAL driver v 1.5.0, it is very simple: cal...
Hi ST Communities,My hardware is MCU STM32F756, USB phy USB3300, eMMC mtfc2gmdea-0m.USB is used for communication between slave and PC,USB driver is combined device class VCP+MSC, and eMMC is hooked up to FATFS.Now the problem is that while eMMC is h...
Hi ST communities,My hardware is MCU STM32F756, eMMC mtfc2gmdea-0m 4bit 24MHZ CLK.FATFS: R0.12C.STM32F7_Cube_FW_Ver：STM32Cube_FW_F7_V1.15.0.Why does eMMC now write data at only 585KB/S. FATFS_WR_SIZE 8192, every time to writes 1024Bytes.uint8_t wtext...
Technical environment :- Master : CM3 (Raspberry)- Slave : STM32F446- CubeMX : V4.23 (even tested with V4.26.1)- Normal transaction is : MASTER do a 4 bytes WRITE, then a 1 byte WRITE and at last, a 4 bytes READ.The slave ACKe...
Dear Sir/Madam:I use three uart of stm32f4 : uart1, uart2 and uart6I have some problems . when uart1 has overrun error,all system get stuck there. I read some websites about this.they mention that in the hal lib, clear ORE does not work, they said, o...
STM32F2: (possibly other families like F4 may be affected too - not verified)Library: STM32Cube_FW_F2_V1.7.0Component:ADC Low Level Driver (file stm32f2xx_ll_adc.c)Affected function: LL_ADC_REG_Initregister CR1 is wrongly initialized with SequencerLe...
Hi I have H7 I would like to use the MPU with Freertos. Is the a detailed application guide on how to implement it how would one use this correct to protect the content on the IC and the IC must self erase if a tamper event has occurred. Tamper in In...
Rev V system boot loader FDCANSTM introduces boot via FDCAN1 with chip revision V.The system boot loader version ischanged form V13.3 to V9.0. I’ve tried to figure out how does it work. Here are my findings- AN2606 rev 38 is updated. It describes...
I found an example using a STM32F103C8T6 to get three VCPs, so I assume it's possible to get more. Can I get an MCU that will support four? With an F0, can many can I get? Two?