Hi,I am implementing DFU over I2C to an STM32L476, trying to follow AN4221 and AN2606.For now I am focused on just getting some DFU command to work successfully over I2C, and I started with "Get Version" to get the bootloader version. I am able to ge...
Dear MCD Application Team,in Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_hal_uart.c you can find this check:/* Ensure that Frequency clock is in the range [3 * baudrate, 4096 * baudrate] */ if ((lpuart_ker_ck_pres < (3U * huart->Init.BaudRate)) || (lp...
Hi,My uC (STM32F30K6T6) is full in RAM memory.To optimize the RAM size, I have planned to reduce the Heap Size Memory (initial Heap size is 0x400).I do not use any manual memory allocation so, I think I will set it to a quarter of it (0x100), just in...
Gradually debug the DMA send function, HAL-UART Transmit DMA, and find that the function will judge a status bit of the serial port handle, gState. It will only send normally when huart ->gState==HAL UART State READY,And the reason why the first tran...
It seems that STM32H563MI has four I2C ( I2C1 ~ I2C4):However, the corresponding STM32H563.svd only includes 2 I2C ( I2C1 ~ I2C2).https://stm32-rs.github.io/stm32-rs/STM32H563.html
SEE EDITI am using the STM32H7B3I-DK. I am trying to write my own simple SPI ISR to handle transmitting and receiving of just one byte I have gotten the slave working with my ISR (while master used HAL). I am now implementing on the master and having...
I am using STM32H7B3I-DK running a touchgfx application and acting as SPI Master, and Nucleo-H743ZI as SPI Slave. Both are configured in interrupt mode not using HWNSS. The Master is sending 0,1,2,3,4,5,6,7, but the slave is only receiving 0,2,4,6,0,...
Hi, I have a custom PCB where I am attempting to bootload an STM32G071CBU6 (using an STM32U575). I am using the bootloader while developing for uploading development builds, so it is being used often. The G0 seems to occasionally, randomly, stop resp...
Using a Nucleo-F411RE board modified to have 8MHz HSE crystal oscillator and running the OTG peripheral in forced host mode, we are working on implementing our own host stack. With the current code no IRQs trigger until a device is physically attach...
The Ethernet reset is not clearing (ETH_DMABMR_SR in DMABMR).I am having a similar issue as others but have not seen a solution in the forum.I am working with the stm3210c-eval board. I know it is no longer available; but it has a version of the proc...