STM32 MCUs Embedded software

Ask questions and find answers on STM32Cube packages, including HAL, LL and middleware, and expansion software.

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STM32F7 record SPDIF data to SD card

Hi,​I'm trying to use a STM32F746 to record SPDIF_Rx to SD card. I'm already got some data and save to SD card.​I use HAL_SPDIFRX_ReceiveDataFlow_DMA(&hspdif, (uint32_t*)&BufferCtl.pcm_buff_32[0], AUDIO_IN_PCM_BUFFER_HALF_SIZE)and HAL_SPDIFRX_RxHalfC...

庭張.1 by Associate
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STM32G4 USBD CMSIS Driver

Is there STM32G4 USBD CMSIS Driver? Because latest (1.5.0) package for G4 doesnt include it. There is an example for CDC, but nothing for CMSIS and RTOS. Seems kinda weird.

FATFS f_open fails when data cache is enabled

When enabled Data cache for example in main:/* Enable D-Cache---------------------------------------------------------*/ SCB_EnableDCache();I think I am supposed to uncomment L63 in sd_diskio.c to activate Cache maintenance:/* USER CODE BEGIN enabl...

SPfis.1 by Associate II
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ETH_DMACSR_RBU error occurs and stalls the Ethernet receive on STM32H7. Is there a way around this issue with the DMA?

Hi, I've been using the STM32H7 example which uses the new reworked Ethernet driver (https://github.com/STMicroelectronics/STM32CubeH7). Changed the application layer of the example (LwIP_HTTP_Server_Netconn_RTOS) and during larger transfers, the DMA...

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Ethernet communication - mx_lwip_process() how often

Hi everyone,I am using STM32f429, and I am using Ethernet communication.Inside the while(1) has the mx_lwip_process() function and I am using the function every while, and I found this function takes a lot of time, so I would like to know how often I...

ACohe.3 by Associate II
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ethernetif_set_link thread is not running. I would like to detect link up or down. I am using STM32F429ZIT6 - Nucleo, FreeRTOS CMSIS v1, LWIP v2.1.2 I am able to break in "tcpip_thread" so I assume it's not a scheduler issue. Anybody has an Idea?

int main(void) { /* USER CODE BEGIN 1 */   /* USER CODE END 1 */   /* MCU Configuration--------------------------------------------------------*/   /* Reset of all peripherals, Initializes the Flash interface and the Systick. */ HAL_Init();...

DPatr.2 by Associate III
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Using DAC1_2 with SDRAM and HS USB PHY

Is this possible - even in a hacky way.the OPAMP2_VOUT (PE7 follower) output clashes with FMC_D4+the DAC1_OUT2 pin (PA5) clashes with USB HS ULPI CKSo is any configuration possible where DAC1_2, USB HS and SDRAM can work together?