STM32 MCUs Embedded software

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Resolved! B-L462E-CELL1 eSIM activation failed

Hello,After having purchased a  B-L462E-CELL1 eval kit with pre-provisioned Truphone eSIM and having followed the UM2743 eSIM activation steps, I still don't see the eSIM marked as activated on the Truphone IoT Dashboard after one day.Truphone suppor...

EAlai.1 by Associate
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  • 4 replies
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STM32G0B1 OpenBootloader using I2C Protocol

Hi ST Team,I'm using ST's openbootloader using i2c protocol. But facing following issues while implementing using stm32cubeprogrammer and ST-Link V3set:1. After reset the user application is not running2. Not able to flash new firmware after 1st time...

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Pranil by Associate
  • 119 Views
  • 1 replies
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Resolved! ST-Link Utility, Can not connect to target!

16:19:16 : Can not connect to target!Please select "Connect Under Reset" mode from Target->Settings menu and try again.If you're trying to connect to a low frequency application , please select a lower SWD Frequency mode from Target->Settings menu.16...

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zrtn by Associate
  • 380 Views
  • 1 replies
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Resolved! STM32F103C8 using SPI2

Hello,i am trying to interface 1.8 inch SPI TFT Display 128 x 160 to the STM32F103C8 using SPI2.https://www.az-delivery.de/products/1-8-zoll-spi-tft-displaySPI1 is used for LoRa, i thought to connect TFT too to SPI1 using addresses but i am affraid t...

hamo by Senior
  • 2689 Views
  • 65 replies
  • 4 kudos

Why would FLASH_FLAG_PGPERR and FLASH_FLAG_PGSERR be set after a successful flash write, and at power-up before any flash write operations?

I've written a flash-based bootloader for the STM32F4 using the latest STM32CubeMX tool and its HAL libraries. I've avoided all the usual pitfalls (it's not my first bootloader), and my code works reliably. I'm not erasing my bootloader segment, writ...

SHers by Associate III
  • 2506 Views
  • 11 replies
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Resolved! 1 MCU(stm32f103) - 2 Master SPI Communication error

  Hello, I am trying to control two Motor Drivers (TMC5041) through SPI communication using STM32F103. The compiler uses IAR. I am trying to communicate with two SPI Masters, but perhaps due to an initial configuration issue, only one SPI is control...

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Jdogk by Associate II
  • 1051 Views
  • 3 replies
  • 3 kudos

Using LevelX NOR OSPI interface with QSPI memory

I'm trying to use the Azure FileX with the LevelX NOR OSPI driver to access a QSPI memory.  I'm using an STM32H723 processor an OctoSPI peripheral to try to interface to a Winbond W25Q128JV QSPI NOR memory. Part of my struggle is there are examples o...

tec683 by Associate III
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  • 2 replies
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Resolved! Turn off all GPIO pins for power

Sleep testing, How do I configure my GPIO pins to absolutely be surenone of them are supplying any power ?I wish to turn the all "off".And if there is a quick way to do it via  CubeMx , so I won't miss any ?   Thanks 

DS.4 by Senior II
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  • 1 replies
  • 2 kudos