Ask questions and find answers on STM32Cube packages, including HAL, LL and middleware, and expansion software.
I was going to start a project based on the F103XX but then I found out that the MCU doesn't support USB OTG. I will need two simultaneous OTG ports. One host and one device.I am having a hard time figuring out what Nucleo board to get. The processor...
Hi I have just purchased the STM32F746G-DISCO board and just powered up to test the demo software. Touchscreen looks really good, but after I plugged in my ethernet cable it comes up with "cable not connected" even though it is (with the orange led ...
I am working on STM32L496 nucleo board. I would like to transfer data from STM32L496 (as device) to host PC (RX is not required).currently, the baud rate is ~200kbyte. no matter if I am increasing the packet size (CDC_DATA_FS_MAX_PACKET_SIZE) to 512...
Hello, I have a question related to the reserved bits (generally to all of them). For example lets disscus specification of STM32F429 MCU from the RM0090:Register TIMx_SR1 (of TIM2 to TIM5 for example) has specified bits 5, 7, 8, 13, 14, 15 as reserv...
Hello,I am trying to make compatible an STM32F746 Discovery's example with STM32CubeMX (weird that it is not already the case). Did somebody already succeed in using the audio loopback example or any other example given by ST in their STM32CubeMX sof...
/* Create the timer(s) */ /* definition and creation of myTimer01 */ osTimerDef(myTimer01, Callback01); myTimer01Handle = osTimerCreate(osTimer(myTimer01), osTimerPeriodic, (void*) 1); /* USER CODE BEGIN RTOS_TIMERS */ /* start timers, add new ones, ...
I'm using a stm32l433 with its bootloader, in uart a send the following sequencethe read command 0x11 0xEEreceive ACKsend the address with checksumreceive ACK or two NACKsSometimes the 4th step is an ACK, others NACKs and i don't know why.When i rece...
Debugger information is displayed incorrectly because STM32H7x3.svd (and others!) in latest version V1.4 seem to be wrong regarding register address offsets of DFSDM module (and maybe others?). At least addresses do not match the latest spec ("RM0433...
In RM 0433 on page 910 there is the following:“1. The ADC clock can be a specific clock source, named adc_ker_ck_input which isindependent and asynchronous with the AHB clock.It can be configured in the RCC (refer to RCC Section for more information ...
