I ask because I need to test the analogue part of a (custom) board which is powered from 12V, but also generates a 3.3V rail from that. I'd prefer to leave the ST-LINK connected if at all possible.
I am designing a custom PCB using STM32F722RET6. How to connect the VREF+ pin(13) on the SMT32F722RET6?.As per the hardware development manual, it says"The VREF+ pin can be connected to the VDDA external power supply"and then, "VDDA=VDD and VSSA=VSS...
Hi ST community,I'm working with NUCLEO L432KC and in my application I need to use I2C1 port. Using STM32CubeMX to generate the project, I could see that when I enable the I2C1 port, Automatically the CubeMX allocate the PA9 and P10 pins. For my appl...
As part of a project work of my studies I have designed a board with which I want to read a KNX bus. Unfortunately, two identical prototypes broke down and I'm not sure why (the components were soldered cleanly and the PCB also made a very good impre...
SummaryAt the end of the day, my issue is missing something in documentation. The lesson here, is test thoroughly. Just because it works for a few minutes, doesn't mean forever. Anyway, I've been running >3mA through the pins that are limited before ...
Please help to find out whether STM32L011F3U6TR mcu boot0/PB9 pin has internal pull-up/pull-down resistor feature. There is no mention that boot0 pin is special in this respect, ie no internal pull-up/pull-down resistor. On my board, unable to bring...
I want to be sure of the interconnects between the STlink and STM32 that will give me full debug capability using the CUBEIDE development environment. It would require 4 connections; 3.3v,gnd, SCLK(PA13) and SDIO(PA14). Some STM docs identify two add...
I have stm32f407zgt6 board. Came to work with Touch. On tft, I use Touch on xpt2046 via spi, on the stm32_f4x (DevEBox) board, the processor pins are wired as sck - pb0, miso-pb2, mosi- pf12. Pins data, CubeMX cannot map like any of the 3 spi on boar...