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Value gaps in DMA transferred ADC data

Setup is as follows:ADC1 & 2 in 'Dual regular simultaneous mode only'DMA1 stream 0 used to transfer ADC data to AXI SRAM buffer (40000 32 bit values), DMA circular mode.Using 'HAL_ADC_ConvHalfCpltCallback' to signal half buffer filled and 'HAL_ADC_Co...

HPiG by Associate II
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