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Resolved! I am using usb-pd system with stm32g071rb76 processor. There are 2 CC pins on this processor. But when I use the stm32g0b1kct6 processor, there is only one CC pin. Why is that. Is there an advantage to it.

I am using usb-pd system with stm32g071rb76 processor. There are 2 CC pins on this processor. But when I use the stm32g0b1kct6 processor, there is only one CC pin. Why is that. Is there an advantage to it. I am using TCPP01-M12 as a protection circui...

Mtopa.1 by • Associate II
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Resolved! Update code remotely

Hi all,I’am working with some nucleo board si ce a while. Now I’am planning to build my first personal board. And my final objective is to be able to update my code in my board remotely. Is it possible ? I have read some article update firmware remot...

SBaro.11 by • Associate III
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Looking for closest software example for implementing Dual Role Power UFP port. According to specification, such port should identify as power sink during initialization, and (in our application) after initialization perform a power role swap command.

Question 1: are there any benefits to using standalone PD controller like STSUB1600 over integrated solution STM32G0x1Question 2: are there code examples that are reasonably close to the DRP functionality ? In all the X-CUBE-USB-PD examples I've see...

VZ.1 by • Associate II
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FreeRTOS and timebase interrupt priority

I’m using STM32Cube MX 6.2.1, STM32Cube IDE 1.6.1 and STM32Cube_FW_H7_V1.9.0 for a STM32H7A3 project. As recommended, I configured the HAL time base source to a timer other than systick. (TIM17) If I understand correctly, FreeRTOS uses systick and se...

AMacI.1 by • Associate II
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STM32H743 Ethernet: can ETH access SRAM4?

Hello, I am writing a driver for the Ethernet interface, and I noticed it fails to read data from buffers lying in SRAM4 (0x38000000 - 0x3800FFFF), with a Fatal Bus Error. According to the MCU's Reference Manual (RM0433) 2.1 Table 3, and 2.1.6 Ethern...

LDroz.2 by • Associate II
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