Ask questions and find answers on STM32 security frameworks and tools, including cryptographic libraries, TrustZone, and the Secure Manager.
Following this question, I am also confused about how to fill the key in the CRYP peripheral. I don't find the Ref Manual very clear The register description mentions the key as an array K and an array b where MSB of K are in lowest address register....
As per information, PCROP configuration has to be cleared on regression of RDP Level from 1 to 0. But on NUCLE-H753ZI evaluation board, PCROP configuration is not clearing on regression.But it is showing as OPTION BYTES Programming successful.Can you...
For sbsfu in the following parts:In AN5056 rev6, see section 8.5 How to validate a firmware image.In UM2262 rev8, Appendix JIt says: At the first user application start-up, if the execution is correct (for example after self-tests execution) the user...
I am working on STM32 crypto library and using STM32L433RC controller,I am facing the issue of signature mismatching.i have followed below stepsStep -1 Key generation using openssl tool for ECC256 curveopenssl ecparam -name prime256v1 -genkey -noout ...
HI I am looking for a link to download the older version of CryptoLib v3, I can only find links to download the latest CryptoLib v4 here which is not the version that I'm looking for. Thanks! https://www.st.com/content/my_st_com/en/products/embedded-...
I have attempted the following:-Build and tested a simple app, called TestApp with STM32CubeIDE/CubeMX, runs fine on itself (without SBSFU)-Build and tested the SBSFU 2_images example, works fine.-The TestApp runs on the same hardware as the SBSFU ex...
We are looking for FIPS 140-2 / 140-3 certified Secure Boot loader implemented with help of X-CUBE-CRYPT LIB for STM32H753VI MCU.if i see NIST-CAVP certification, it is mentioned as STM32L4 series, then is thios same certificate is applicable for STM...
I found an application note for regression of RDP level using OEM keys via STM cube CLI .But my use case is to do it by firmware .Can it be done ?/Jaroslav HOUDEK @zqizh.1
WIth oocd I try to do following steps:1) Send reset and halt command2) disable bit DHCSR.C_MASKINTS3) Enable interrupts into ISER reg4) Make any interrupt pending in ISPR reg5) Perform Step commandif readout protection is diasabled, core interrupt oc...