As I understand OTFDEC will be used to on-fly decryption, while execution (am I correct)?After debug is fused (RDP set to level 2) all DHUK keys are individual for each device, while during debug phase all keys are common. How can I make test run of ...
I set my flash OB to iROT-Provisioned (Dont know exactly Product life cycle state, but I can not debug anymore) Based on my understanding, it may be in a CLOSED state. However, I am not sure how to change the state as I want to follow the Debug authe...
Currently, my program cannot be executed, and it is useless to pull up the boot pin, and STLink cannot be linked. There is a way to reset the chip register boot_lock, TZNE, and RDP? or how to perform full chip erasure?
Hi @ChannelWe are using STM32U585 for implementation of TF-M and TF-M SBSFU for our project. now we are planning to change our controller to STM32U5A5 controller. I have couple of doubtsSTM32U585 is PSA Level3 certified while STM32U5A5 is not PSA lev...
Hi,I am trying to implement SBSFU on NUCLEO L452RE board just by copying the project for NUCLEO L432KC (2_images, Y modem protocol) and changing necessary elements (target device, startup_***.s file, UART and led setup). When trying to download UserA...
Hi there. Before attempting any password locking on my STM32575, I read the password lock location and it returned all zeroes like soReading 32-bit memory content Size : 4 Bytes Address: : 0x400220200x40022020 : 00000000After setting the PW, it...
I've run into an issue with the section of the UserApp linker script which ensures that the binary size is a multiple of 16 bytes:.align16 : { . = . + 1; /* _edata=. is aligned on 8 bytes so could be aligned on 16 bytes: add 1 byte gap */ ...
I have flashed the SBSFU application with write protection enabled for flash address 0x08000000. After that, I am unable to erase using jlink commander.exe as well as by IAR->project->Download->erase.STM32H743 has SWD interface and i am using jlink ...
I'm trying to enable secure boot for general purpose ARM microcontrollers. Based on my research, secure boot starts with a Root of Trust (ROT). Usually this ROT is hardware based, which means that the microcontroller should have a dedicated immutable...