Posted on August 20, 2016 at 12:21Running 4.15 and as a programmer I really don't need this Xa+Xb rubbish. Can we just have a decimal (or preferably) an hex field?If it is going to have something clever like this then at least make sure it works. T...
Posted on October 14, 2016 at 00:41Dear All, I successfully could integrate the AES GCM algorithms (firmware variant, no hardware acceleration) of STM32 cryptographic library v2.0.6 into the project. It encrypts and decrypts the plaintext correctly ...
Posted on January 12, 2011 at 13:46CRC computation #stm-crc32 #stm32f2-crc
Posted on August 17, 2016 at 12:34 Hi, I'm implementing the read out protection for the F746 controller. Changing it from level0 to level1 at the first start from my code. First I realised that the level1 was setted but not saved after a...
Posted on August 31, 2016 at 18:29Hello, Admin and everyone.Please let me ask,Can we use Openssl with STM32 nucleo board ? if possible, how ?I cannot read the lib on Keil.and can we migrate from Opennssl to STM32 crypto lib ?Thanks. #stm32-crypto...
Posted on May 13, 2015 at 11:11 Hello! I'm having trouble using the STM32 Crytpographic Library SHA256 hash in an application running on an STM32F091RC MCU. I'm using it to verify contents in flash (FW download), but have now retraced to ...
Posted on August 29, 2016 at 20:46Hi all, In the https://www.iar.com/support/tech-notes/general/calculate-crc32-as-in-stm32-hardware-v.5.50-and-later/ they instruct to fill unused ROM with 0xFF, is is arbitrary or is there some logic to it? The reas...
Posted on August 03, 2016 at 18:29Calls to the HAL_CRC_Calculate are causing hard faults.When I step through I found out why: switch (hcrc->InputDataFormat) { case CRC_INPUTDATA_FORMAT_WORDS: /* Enter 32-bit input data to the CRC calcula...
Posted on March 08, 2013 at 10:31 I've stolen some code from Clive's post here <https://my.st.com/a99fbbe2> (Thanks Clive!) and it works great for computing a CRC all at once. In other words, the following function signature. unsigned...
Posted on June 15, 2016 at 19:16I just discovered the hard way that if you initiate a full flash erase cycle (in my case, by going from RDP level 1 to level 0) and reset the chip before that process is complete then the chip is essentially (AFAICT) ...