Power management

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VNL5030J-E Propagation Delay failing

Hello STmicro Team, I have done a propagation delay analysis using VNL5030J-E. The Delay-on time, rise time and delay-off time does not matches with the datasheet Values. Please check and let me know your feedback in this. I am attaching here the sna...

Priya2 by Associate
  • 1 replies
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Resolved! power MOSFET spice models

I am trying to get the spice model for STW3N170  MOSFET, it does not seem to be with the other info for the devive.Any help appreciated. Paul

PDB_IW by Associate
  • 3 replies
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Hi,We are using STPM32 with LPC controller, when observing the startup reset pulse we are getting as in the picture attached. Both SYN and SCS pins are initialized high but when powered on SYN is coming low for some time then it is taking 35ms delay ...

KTH by Associate
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Resolved! L9026 Device ID Value

Recently started working on the L9026 Device,  as an initial setup, trying to read the Device ID.   With The L9026 Evaluation board Device ID is read as 0x55, With L9026 Placed on the Our Target Board, Device ID is read as 0x56,  Was surprised with t...

Resolved! L99MH98

I would like to know the working principle of the charger bump for MH98, as well as the working principles of CPOUT, CP1, and CP2. Why can the voltage of the bootstrap capacitor reach 11.3V when VDH = 6V? In other words, why can the voltage of CP rea...

Resolved! LDL212PUR bypass capacitor requirements

Hi all. The data sheet for the LDL212PUR low dropout linear regulator does nor specify the quality of the input and output bypass capacitors with regard to ESR or loss tangent requirements.  Most LDO regulators require at least one low ESR bypass cap...

SteveD by Associate
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Please reply my question regarding L9369 GIO

I am writing because I have a question about the L9369 chip. The second case of above table ( SPI_GIOx_HSCtrl == 0 and SPI_Off_Giox == 1) , Output  is set to HIGH. I'm curious why GIOx Output is HIGH when SPI_GIOx_HSCtrl is 0.  Thank you.