Ask questions and find answers on STM32 microprocessors and dedicated embedded software solutions, such as Yocto SDK, Qt, and OP-TEE.
Looking at the clock in the MX Device Configuration Tool it says 204 to APB1 Timer Clocks (MHz).To get to 10000 Hz I have to divide 204 MHz by 20400. Fortunately there are a bunch of ways to do this. But on the first try I tried Prescaler 51Counter ...
Is there any plan to release C++17 compatible HAL and LL libraries for MP1 platform? I had written a lot of code in C++17 and later found out that MP1 libraries are full of `register` keyword which is not supported since C++17. A temporary solution i...
I've enabled pps-gpio and pps in the kernel config and added the following to the device tree:/{ //... pps{ compatible = "pps-gpio"; gpios = <&gpiod 13 GPIO_PULL_UP>; status = "okay"; }; };but this results in the follo...
Good day,Has anyone been able to compile Azure Sphere OS for the STM32MP157D-DK1.I have the yocto environment configured, and I am able to build a vanilla embedded Linux image, but when I add the azure bblayers to the build. the build fails. I also t...
I have custom stm32mp1 board and when running it as USB mass storage in U-Boot (ums 0 mmc 0), the USB driver is not detected nor by Linux nor by Windows. I am also attaching shematc comparison of eval-board VS my custom board. Also the USB-ORG is wor...
In previous releases of OpenSTLinux, u-boot used the NAND DFU backend to write to the NAND flash in the EV1 dev board. For UBI images, this required that the image was generated using the --space-fixup flag.To avoid this requirement, I submitted a pa...
I am enabling SPI1 controller and selecting PLL3Q as its kernel clock source on CubeMX. But automatic code is not generated for it.It looks like #DEFINES for SPI1 do not exist in stm32mp1-clksrc.h, while they do exist for other SPI controllers.
Hi All.I want to use the battery to power the RETRAM so that the contents of the RETRAM can be preserved even if the board is not powered.To do this, I connected the battery to the VBAT pin and set the "PWR_CR2_RREN" value to the "PWR_CR2" register o...
I have a problem to get the ethernet to work with the PHY AR8035 (Atheros). The board is from MYiR (MYC-YA157C-V2), but they are only providing yocto based image and I'm doing my work with buildroot. I'm using the bootlin buildroot branch: st/2021.02...
Hello, I'm trying to PWM some pins using the sysfs interface on the openSTLinux but unfortunately, it's not working.I've been changing the device tree files in order to get it working, but still without success.I'm trying to follow this wiki but when...
