Resolved! Azure RTOS available for Cortex-M of STM32MP1 devices?
I would like to run Azure RTOS application on Cortex-M of STM32MP1 SOC. Is Azure RTOS available for Cortex-M of STM32MP1 devices? any example code?
I would like to run Azure RTOS application on Cortex-M of STM32MP1 SOC. Is Azure RTOS available for Cortex-M of STM32MP1 devices? any example code?
Hello everyone, i want to onfigure my stm machine on yocto using the meta-st layer:i want to make two root partitions on the sd card (since i'm using the stm32mp157c-dk2)the root partitions i need to integrate rauc updater in my machine.since i insta...
Hello,I'm trying to define some GPIOs as simple input/output for STM32MP157. I'm using the STM32CubeMX tool, but I can't find where to assign the GPIOs to A7 or M4. In the pinout view, I correctly set them as input/output but when I generate the code...
Hello, I'm trying to create the Distribution package for my STM32MP157D-DK1. When I first installed and ran, it said it was running, It stayed that way for the afternoon. I let it 'run' overnight to the same line. I ^C'd out of it. Since then I get t...
Hello,I am going through building the base Android Distro for use in the STM32MP1 Discovery board, when I go to call the disco i.e. lunch aosp_disco-eng I get the error listed in the question.When I call lunch aosp_eval-eng then I get no error and we...
I'm a newbie with embedded topics, for educational purposes I'm trying to set up my ST32MP157C-DK2 using Buildroot.Using menuconfig I pointed Kernel, TF-A and U-boot to the latest label releases of ST forked repos. But it did not work because it aske...
Hi,I'm interested in all possible mechanisms of M4 waking A7. I know that this can be done with virtual UART and GPIO pins (6 of them if I'm right), but are there other ways to do it?Nenad
Moreover, when I play the demo video, core usage reaches up to 70%, so is the GPU really working? The blacklist file:root@stm32mp1:~# cat /etc/modprobe.d/blacklist.conf blacklist etnavivDmesg:root@stm32mp1:~# dmesg | grep galcore [ 19.326759] galc...
CubeMX generates pinctrl bindings inside ltdc node, while here : https://wiki.st.com/stm32mpu/wiki/LTDC_device_tree_configuration pinctrl bindings reside inside panel node
I'm shopping for MCU / MPU hybrid processors like the STM32MP1, targeting applications that need Ethernet connectivity to both the MCU and the MPU. Simultaneous connectivity would be easiest to plan for, but selectable connectivity might also work.I ...