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How to make Ethernet and lwIP working on STM32

Piranha
Chief II

This is an umbrella topic where I will collect the key problems and solutions to finally get networking on STM32 working. The issues formatted as bold are the most critical ones.

HAL ETH drivers have been significantly reworked since the following firmware packages: CubeF4 v1.27.0, CubeF7 v1.17.0, CubeH5 v1.0.0, CubeH7 v1.10.0

Series: F1, F2, F4, F7, H5, H7 (all STM32 with Ethernet)

Series: F1, F2, F4, F7 (older Synopsys basic peripheral)

Series: H5, H7 (newer Synopsys QoS peripheral)

Series: F7, H7 (Cortex-M7 CPU)

lwIP API related:

Other related information:

Another detailed topic by @alister​: "[bug fixes] STM32H7 Ethernet". While mostly dedicated to H7 series, it also has a good amount of information relevant to all Ethernet/lwIP related development.

Open source zero-copy Ethernet/lwIP driver example. The hardware driver is for F2 series, which means that it's almost the same for all Fx series. The lwIP related code and general ideas are still valid for all series.

My other closely related topic: "Actually working STM32 Ethernet and lwIP demonstration firmware". As that topic is currently unavailable, because ST still has not moved it to the new forum, I am attaching a PDF copy of that topic and the related firmware files to this topic.

This discussion has been locked for participation. If you have a question, please start a new topic in order to ask your question
1 ACCEPTED SOLUTION

Accepted Solutions
STea
ST Employee

Dear community members, 

Thank you for your continuous support and feedback to identify potential issues related to Ethernet. The input provided in this conversation thread has helped us to improve the solution from HAL drivers examples and documentation perspectives.  

As many of the mentioned issues have been fixed, we wanted to give you a status update (see below). We are aware that some issues persist, and we will continue the analysis to provide solutions. In the meantime, if you have further feedback, please let us know, and don’t hesitate to start a thread if you encounter an issue that has not yet been mentioned here.  

Thanks, 

Post 

Status 

Missing compiler and CPU memory barriers.  

Implemented in the new HAL_ETH_Driver.  

Refer to the thread Ethernet HAL Driver reworked by ST and available in 22Q1 (preview now available on GitHub) for more details about some of the applied fixes. (1)

RMII mode not enabled because of lacking SYSCFG synchronization. 

Unwanted interrupts not masked. 

Many flaws as a result from *** porting of the reworked H7 series HAL ETH driver.  

Wrong and misleading descriptor tail pointer documentation. 

Tx complete interrupt not triggered. 

Unnecessary delay in LAN8742_Init() and link state management in low_level_init(). 

Questions answered 

Unnecessary delays and peripheral reset in HAL_ETH_Init() function. 

lwIP driver Tx deadlock. 

CubeMX generates wrong PHY configuration.  

Fixed in STM32CubeMX-6.9.0 

Wrong clock source and PLL configuration. 

FIXED IN STM32CubeF7 v1.17.2 

Overlapping memory regions in linker script files. 

Fixed mismatch in linker section names between linker file and source file. 

lwIP driver zero-copy Rx PBUF pool size is inappropriate. 

resolved in the STM32CubeH7 V1.10 

Multiple flaws in a PTP API implementation. 

Main reported issues fixed- 

Some enhancements are required 

Poorly chosen MDC (MDIO) frequency limits and scarce documentation. 

Documentation internally updated. 

133712 (used for internal reference only)

No DMA access to a data in FLASH memory 

Move bufffers of fsdata_custom.c file from Flash to RAM. In v1.28 of Stm32cubeF4 

Wrong Tx checksum offload documentation. 

Documentation internally updated. 

140321 (used for internal reference only)

Wrong PTP clock source documentation. 

Documentation internally updated. 

141623 (used for internal reference only)

Wrong PPS output documentation. 

Documentation internally updated. 

118901 (used for internal reference only)

Wrong descriptor ring length documentation. 

Documentation internally updated. 

121000 (used for internal reference only)

Flawed MPU configuration and D-cache maintenance in lwIP driver. 

Fixes applied on Lwip projects in STM32CubeH7 v1.11.2 

Not possible to use a custom PHY driver in CubeMX. 

Investigation ongoing. We will update you case by case in this post. 

ETH_DMACSR_RBU error occurs and stalls the Ethernet receive on STM32H7. 

Wrong or scarce DMA Rx resuming documentation 

Ethernet link and DHCP management code is not thread-safe 

 (1) the reworked Ethernet driver is available for:

  • STM32CubeH7: V1.10.0 (or higher)
  • STM32CubeF4 :V1.27.0  (or higher)
  • STM32CubeF7 :V1.17.0 (or higher)

STM32CubeF1 and STM32CubeF2 don’t get a reworked Ethernet driver.

These updates are available From CubeMX version 6.4.0 and higher and we recommend using the latest tools and software versions to make sure latest fixes and patches are applied.

To enhance our support related to Ethernet topics, feel free to review the following material that hopefully help you in some use-cases:  

For issues related to documentation that were identified but not yet solved, feel free to keep an eye on the following knowledgebase articles:  

In order to give better visibility on the answered topics, please click on Accept as Solution on the reply which solved your issue or answered your question.

View solution in original post

27 REPLIES 27
Piranha
Chief II

As the main topic has hit a 10000 character limit, I'm changing this message to a list of fixed issues, which many people will still find useful.

Series: F1, F2, F4, F7 (older Synopsys basic peripheral)

Series: H7 (newer Synopsys QoS peripheral)

Series: F7, H7 (Cortex-M7 based)

  • lwIP driver Rx data buffers not aligned to cache line size. The address and size of buffers, on which D-cache invalidation is done, must be aligned to __SCB_DCACHE_LINE_SIZE, which is 32 bytes for Cortex-M7. Instead of doing D-cache maintenance, newer ST provided code uses MPU to configure specific memory regions as non-cacheable. It's a very poor solution performance wise, but at least it is functionally correct. For a proper and decent solution it is recommended to read my article "Maintaining CPU data cache coherence for DMA buffers". [Fixed by using MPU.]
Amel NASRI
ST Employee

Hi @Piranha​ ,

Needed follow-up actions for each discussion are tracked internally by me & Imen.

I suggest to close the current question.

-Amel

To give better visibility on the answered topics, please click on Accept as Solution on the reply which solved your issue or answered your question.

Piranha
Chief II

I've added substantial amount of new information.

Hi Piranha,

Thank you very much for the information.

If I may please ask why you don't share the sources ? I will try to do the modifications for H7.

Thanks

nguen nguyen
Associate II

Can anyone send example project ? thanks so much Cubemx 5.4

alister
Lead

My fixes and improvements to ST's STM32H7 ETH driver and lwIP ethernetif.c are at https://community.st.com/s/question/0D50X0000C6eNNSSQ2/bug-fixes-stm32h7-ethernet.

Source code and documentation attached.

I don't use evaluation boards or build example code.

You'll have to port my changes yourself.

anotherandrew
Senior

Thank you @Piranha​ for this detailed write-up! I've updated the original thread to point to this one. *excellent* information and lots of detail.

JBerry
Associate III

I am attempting to get Ethernet work on an STM32H745 on the M7 core currently. But I am using CubeIDE 1.4.2 and CubeMX 6.0.1 with ver 1.8.0 of the H7 firmware package. Since these are a bit newer, it is unclear to me which of these issues are still present and which still need fixing. Does anyone have any updates that apply to the newer stuff?

Yes, I think same as you. It is worthy to make it clear which ones have remained until now.