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Function |
Series (Lines) / |
Update Location |
Current Description / |
Date |
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Features and peripheral counts
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STM32C071x8/xB (Sep 2024) |
Table 2. STM32C071x8/xB family device features and peripheral counts |
Current: 
Expected:  |
Nov 2024 |
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STM32G071x8/xB (Sep 2021) |
Table 2. STM32G071x8/xB family device features and peripheral counts |
Expected : UCPD : 1 for STM32G081_EB/G8/GB/K8/KB |
Nov 2024 |
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STM32H723VE STM32H723VG STM32H723ZE STM32H723ZG (November 2023) |
Table 1. STM32H723xE/G features and peripheral counts |
Current: 
Expected : - Remove unused "Present in IC" - Separate Operational Amplifier and Comparator instance count from 12-bit DAC peripheral row.
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Dec 2024 |
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STM32N6x5xx STM32N6x7xx (Feb 2025) |
Video |
Current: H264 video encoding acceleration: baseline Expected : H264 video encoding acceleration: baseline
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Mar 2025 |
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STM32N6x5xx STM32N6x7xx (Feb 2025) |
2 Description |
Current: Optionally, the devices embed a hardware H264 encoding block supporting baseline profile, main profile and high profile level 1 to level 5.2, supporting frame rates of up to 30 frames per second for 1080p resolution. Expected : Optionally, the devices embed a hardware H264 encoding block supporting baseline profile, main profile and high profile level 1 to level 5.2, supporting frame rates of up to 15 frames per second for 1080p resolution. |
Mar 2025 |
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STM32N6x5xx STM32N6x7xx (Feb 2025) |
3.31 Video encoder (VENC) |
Current: 1080p30 Expected : Replace by "1080p15" in all chapter
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Mar 2025 |
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Pin descriptions
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STM32L053C6 STM32L053C8 STM32L053R6 STM32L053R8 (June 2019) |
Table 15. STM32L053x6/8 pin definitions |
Current: For UFQFPN48: The pins are labeled incorrectly from pins 2 to 6 (pins are wrongly shifted down) and there is no pin 7. Expected : For UFQFPN48, correct the pins number and add pin 7. |
Dec 2024 |
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STM32H7B0xB (May 2022) |
Table 14. Port G alternate functions |
Current: Alternate FMC Information missing for PG15. Expected : Add FMC_SDNCAS alternate function for PG15. |
Dec 2024 |
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STM32H7B0xB (May 2022) |
Table 7. STM32H7B0xB pin/ball definition |
Current: PG1 is FT_h2 Expected : PG1 must be FT_ah2 due to OPAMP2_VINM analog additional function. |
Dec 2024 |
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STM32N6x5xx STM32N6x7xx (Feb 2025) |
Table 18. Pin description |
Current: PA7 pin have a ADC1_INP14, ADC2_IN14, WKUP2 additional functions Expected : Remove the additional functions for PA7 pin
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Mar 2025 |
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Pinouts, pin description and alternate functions
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STM32H523xx (Nov 2024) |
Figure 11. UFBGA144 ballout |
Expected: Replace M12 by VSS in figure 11 |
Jun 2024 |
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STM32G071x8/xB (Sep 2021) |
Table 12. Pin assignment and description |
Current: Note 3: 3. Upon reset, a pull-down resistor might be present on PB15, PA8, PD0, or PD2, depending on the voltage level on PB0, PA9, PC6, PA10, PD1, and PD3. In order to disable this resistor, strobe the UCPDx_STROBE bit of the SYSCFG_CFGR1 register during start-up sequence. Expected: 3. Upon reset, a pull-down resistor might be present on PA8, PB15, PD0, or PD2, depending on the voltage level on PA9/PC6, PA10/PB0, PD1, and PD3, respectively. In order to disable this resistor, strobe the UCPDx_STROBE bit of the SYSCFG_CFGR1 register during start-up sequence. |
Nov 2024 |
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STM32H730AB STM32H730IB (Nov 2023) |
Figure 6. TFBGA144 ballout (without SMPS) |
Current: Figure 6. TFBGA144 ballout (without SMPS) Expected: Figure 6. UFBFA144 ballout (without SMPS) |
Mar 2025 |
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I/O port characteristics |
STM32H523xx (Nov 2024) |
Figure 20. VIL/VIH for all I/Os except BOOT0 |
Current: 
Expected:  |
Jun 2024 |
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Electrical characteristics |
STM32G491xC STM32G491xE (Apr 2024) |
5.2 Absolute maximum rating |
Current: The phrase "Exposure to maximum rating conditions for extended periods may affect device reliability" mentioned twice on the first lines of the Paragraph 5.2. Expected: Keep only one phrase. |
Sep 2024 |
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STM32H730AB STM32H730IB (Nov 2023) |
Table 88. 12-bit ADC accuracy(1)(2) |
Current: The EG value is "TBD". Expected: EG Typical = +/-2 LSBs
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Mar 2025 |
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STM32U5Gxxx (Mar 2025) |
Table 80. HSE oscillator characteristics |
Expected: Replace the whole table  |
Mar 2025 |
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STM32WL33xx (Nov 2024) |
Table 35. Blocking, selectivity and saturation at 915 MHz |
Expected: Units on table 35 should be in “dBm”
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Mar 2025 |
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STM32N6x5xx STM32N6x7xx (Feb 2025) |
Table 42. Current consumption in Stop mode |
Current: IDD=9.1 mA IDDCORE=273.4 µA Expected: IDD=273.4 µA IDDCORE=9.1 mA |
Mar 2025 |
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RTC |
STM32H735xG (Nov 2023) |
Table 31. "Typical and maximum current consumption in Standby mode" |
Current: The max values are present for “RTC and LSE” ON Expected: The max values for “RTC and LSE” should be placed for “RTC and LSE” OFF |
Aug 2024 |
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USART / UART
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STM32H533xx (Nov 2024)
STM32H523xx (Nov 2024) |
Figure 1. STM32H5XXxx block diagram |
Current: 
Expected: For USAR1, USART2, USART3, UART4, UART5, USART6 : Update RTS by RTS_DE |
Jun 2024 |
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TIM |
STM32H757xI (Mar 2024) |
Tables "Port B alternate functions" and "Port H alternate functions” |
Current: TIM12 AFs are missing in the tables "Port B alternate functions" and "Port H alternate functions" and should be mapped in the AF2 Expected: Add TIM12 AFs in the tables "Port B alternate functions" and "Port H alternate functions" and should be mapped in the AF2. |
Aug 2024 |
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STM32U545xx DS14216 Rev4 (Dec 2023)
STM32U535xx (Dec 2023)
STM32U5Axxx (Jul 2023)
STM32U59xxx (Jul 2023)
STM32U5Gxxx (Mar 2025)
STM32U5Fxxx DS14395 Rev 3 (Mar 2025)
STM32U585xx (Jul 2024)
STM32U575xx (Jul 2024) |
Table xxx. WWDG min/max timeout value at 160 MHz (PCLK) |
Expected: Correct values for WDGTB = 6
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Nov 2024 |
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STM32H725xE/G (Nov 2023) |
Table 5. Timer feature comparison
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Current: 1. The maximum timer clock is up to 550 MHz depending on theTIMPRE bit in the RCC_CFGR register and D2PRE1/2 bits in Expected: The maximum timer clock is up to 275 MHz depending on the TIMPRE bit in the RCC_CFGR register and D2PRE1/2 bits in RCC_D2CFGR register. |
Mar 2025 |
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STM32H735xG (Nov 2023) |
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STM32H733VG STM32H733ZG (Nov 2023) |
Table 4. Timer feature comparison |
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TAMPER |
STM32H742xI (Mar 2023) |
Table 2. STM32H742xI/G and STM32H743xI/G features and peripheral counts |
Current: The wakeup pins and tamp pins of STM32H743AI are inverted.
Expected : Replace by :
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Apr 2024 |
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Operating conditions
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STM32H742xI (Mar 2023) |
Table "General operating conditions" located in sections: - Electrical characteristics (rev Y) - Electrical characteristics (rev V) sections |
Expected: Remove "Ambient temperature for the suffix 3 version" line. |
Apr 2024 |
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STM32G031x4 /x6/x8 (Oct 2021) |
Table. Current consumption in Standby mode |
Current: ULPEN = 0 Expected: Replace the ULPEN = 0 by ENB_ULP=0. |
May 2024 |
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STM32G041x6 /x8 (Oct 2021) |
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STM32G071x8 /xB (Sep 2021) |
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STM32G051x6 /x8 (Nov 2021) |
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STM32G061x6 /x8 (Nov 2021) |
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STM32G081xB (Sep 2021) |
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STM32U083xC (Mar 2024)
STM32U073xx (Mar 2024) |
Table 40. Current consumption in Stop 2 mode |
Current: For “LCD disabled” condition: - EN_ULP = 0 - EN_ULP = 1 Expected: For “LCD disabled” condition: - EN_ULP = 1 - EN_ULP = 0 |
Jun 2024 |
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Table 41. Current consumption in Standby mode |
Current: For “No independent watchdog” condition: - EN_ULP = 0 - EN_ULP = 1 Expected: For “No independent watchdog” condition: - EN_ULP = 1 - EN_ULP = 0 |
Jun 2024 |
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Table 42. Current consumption in Shutdown mode |
Expected: Remove in Conditions column: EN_ULP = 0 |
Jun 2024 |
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STM32L053C6 STM32L053C8 STM32L053R6 STM32L053R8 (June 2019) |
Table 68. Comparator 1 characteristics |
Expected : Remove rows for parameters R400k and R10k. |
Dec 2024 |
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FMC
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STM32H523xx (Apr 2024) |
FMC characteristics section |
Current: Missing Figure “Asynchronous multiplexed PSRAM/NOR write waveforms” Expected: Add this figure.  |
Jun |
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STM32H723VE STM32H723VG STM32H723ZE STM32H723ZG (Nov 2023) |
FMC characteristics section |
Current: Missing Figure “Asynchronous multiplexed PSRAM/NOR write waveforms” Expected: Add this figure:  |
Dec 2024 |
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STM32H7S3x8 STM32H7S7x8 (Nov 2024) |
SDRAM waveforms and timings
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Expected: In all timing tables, Tfmc_ker_ck is the fmc_ker_ck clock period, with the following FMC_SDCLK maximum values:
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Aug 2024 |
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STM32H7R3x8 STM32H7R7x8 (Mar 2024) |
Aug 2024 |
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ADC
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STM32H503xx (Oct 2024) |
"12-bit ADC characteristics" section |
Current: "Unless otherwise specified, the parameters given in Table xx are derived from tests performed under the ambient temperature, fPCLK2 frequency and VDDA supply voltage conditions summarized in Table yy" Expected: Replace "fPCLK2 frequency" by "fHCLK frequency" from the first paragraph in the "12-bit ADC characteristics" section. |
Mar 2024 |
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STM32H742xI (Mar 2023) |
"16-bit ADC characteristics" sub sections located in sections: - Electrical characteristics (rev Y) - Electrical characteristics (rev V) sections |
Current: "Unless otherwise specified, the parameters given in Table xx are derived from tests performed under the ambient temperature, fPCLK2 frequency and VDDA supply voltage conditions summarized in Table yy: General operating conditions". Expected: Replace "fPCLK2 frequency" by "fHCLK frequency"from the first paragraph. |
Mar 2024 |
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STM32H753xI (Mar 2023) |
Mar 2024 |
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STM32H750VB STM32H750ZB STM32H750IB STM32H750XB (Mar 2023) |
Mar 2024 |
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STM32H735xG (Nov 2023) |
Mar 2024 |
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STM32H735xG (Nov 2023) |
Table 89. 12-bit ADC accuracy |
Current: 
Expected: EG Typical = +/-2 LSBs EG Max = +/-5 LSBs |
May 2024 |
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STM32H742xI (Mar 2023) |
Figure 1. STM32H742xI/G block diagram
Figure 2. STM32H743xI/G block diagram |
Current: In Figure 1. STM32H742xI/G block diagram: 1- Up to 20 analog inputs common to ADC1 & 2. 2- Up to 17 analog inputs common to ADC1 and 2 Expected: To replace by: 1- Up to 20 analog inputs Most are common to ADC1 & 2 2- Up to 17 analog inputs Some common to ADC1 and 2 |
Apr |
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STM32H747xI (Mar 2023) |
Figure 1. STM32H747xI/G block diagram |
Apr |
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DAC |
STM32H757xI (Mar 2024) |
Figure 1. STM32H757xI block diagram |
Current: 
Expected:
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Mar 2025 |
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Memory |
STM32H523xx (Nov 2024)
STM32H533xx (Nov 2024) |
Table . Dynamic characteristics: eMMC characteristics, VDD = 1.71 to 1.9 V |
Current: - The max value for Output valid time HS: 7/5 - Footnote (3). When using PB13 and PB14 Expected: - For Output valid time HS, replace the max value '7/5' by 7/75' - Replace the footnote (3): " When using PB13 & PB14" by "When using PB13" |
Jun |
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DCMI |
STM32U5Axxx (Jul 2023) |
Digital camera interface (DCMI)
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Current: The DCMI is a synchronous parallel interface able to receive a high-speed data flow from an external 8-, 10-, 12- or 14-bit CMOS camera module. It supports different data formats: YCbCr4:2:2/RGB565 progressive video and compressed data (JPEG). This interface is for use with black and white cameras, X24 and X5 cameras, and it is assumed that all preprocessing such as resizing is performed in the camera module. Expected: The digital camera is a synchronous parallel interface able to receive a high-speed data flow from an external 8-, 10-, 12- or 14-bit CMOS camera module. It supports different data formats: YCbCr4:2:2/RGB565 progressive video and compressed data (JPEG).
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Oct 2024
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STM32U535xx (Dec 2023) |
Mar 2025 |
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USB
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STM32C071x8/xB (Sep 2024) |
3.20 Universal serial bus device (USB) and host (USBH) |
Current: It requires a precise 48 MHz clock that is generated from the internal high-speed external clock source or by the internal 48 MHz oscillator in automatic trimming mode. Expected: It requires a precise 48 MHz clock that is coming from a high-speed external clock (from an external source or an oscillator) or by the internal 48 MHz oscillator in automatic trimming mode. |
Nov 2024 |
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STM32F373xx (Jun 2016) |
Table 12. Alternate functions for port PA. |
Current: Missing USB mapped on PA11-PA12 as AF14 Expected: Add USB mapped on PA11-PA12 as AF14. |
Apr |
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Package information
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STM32C071x8/xB (Sep 2024) |
Table 79. Thermal resistance |
Current: Values for UFQFPN28 package: TBD Expected: Add values for UFQFPN28 package: - Thermal resistance junction-ambient: 59 - Thermal resistance junction-board: 23.8 - Thermal resistance junction-case: 26.8 |
Nov 2024 |
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STM32F410x8 STM32F410xB (Jan 2025) |
Table 79. UFQFPN48 – Mechanical data |
Current: Missing A3 dimension. Expected: 
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Mar 2025 |
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STM32H757xI (Mar 2024) |
Figure 79. TFBGA240+25 - Outline |
Current: 
Expected: Replace the "S" in the bottom view by "U" |
Mar 2025 |
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STM32C071x8/xB (Sep 2024) |
Table 71. UFQFPN32 - Mechanical data |
Current: See Table 75: Exposed pad variation Expected: Add values from table 73. D2 and E2: - Min 3.40 millimeters - Typ 3.50 millimeters - Max 3.60 millimeters |
Mar 2025 |
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STM32C071x8/xB (Sep 2024) |
Table 73. Exposed pad variation |
Current: Table 73: Exposed pad variation Expected: Delete table 75. Exposed pad variation |
Mar 2025 |
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Memory mapping |
STM32F405xx STM32F407xx (Nov 2024) |
Figure 18. STM32F40xxx memory map |
Current: AHB1 starting address is 0x4002 000 Expected: AHB1 starting address is 0x4002 0000 |
Mar 2025 |
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GPIO |
STM32WBA6xxx (Feb 2025) |
3.14 General-purpose input/output (GPIO) |
Current: Missing " GPIO using PD6 and PD7" section Expected: Add section: 3.14.1 GPIO using PD6 and PD7 |
Mar 2025 |
