cancel
Showing results for 
Search instead for 
Did you mean: 

STM32 MCU datasheets: Expected preliminary updates

Imen.D
ST Employee

Introduction 

This article includes preliminary updates of STM32 MCU datasheets reported since 1st January 2024.  It highlights the current description requiring update and the expected one if available.

The purpose of this article is to deliver any expected updates to our MCU datasheets prior to actual documentation releases. We wish to be transparent with our updates and provide them as fast as possible, to assist you in your design process.
This article is updated on a quarterly basis. Once these preliminary updates are manifested in the datasheets, this article is refreshed with new information.
Moving forward, we are also working on providing datasheet releases on a more frequent basis.

IMPORTANT NOTICE - READ CAREFULLY :

  • STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to this article at any time without notice.
  • Information in this article supersedes and replaces information previously supplied in any prior versions of this article.
  • The following table gives a quick reference to the preliminary documentation updates which may be changed or improved without notice. 
  • This article will be reviewed on a quarterly basis and applied updates will be removed from the table.
  • The hyperlinks under "Doc Reference - Revision" provides a direct link to the specific document page where the description is located.  

Summary of documentation updates: "STM32 MCU datasheets"

Function

Series (Lines) /
Doc Reference Revision

Update Location

Current Description / 
Expected Description

Date 
of added update

Features and peripheral counts

 

 

 

 

 

 

 

 

STM32C071x8/xB

DS14693 Rev 1

(Sep 2024)

Table 2. STM32C071x8/xB family device features and peripheral counts

Current:

ImenD_0-1733425318863.png

 Expected:

ImenD_1-1733425318868.png

Nov 2024

STM32G071x8/xB

DS12232 Rev 4

(Sep 2021)

Table 2. STM32G071x8/xB family device features and peripheral counts

Expected :

UCPD : 1 for STM32G081_EB/G8/GB/K8/KB

Nov 2024

STM32H723VE STM32H723VG STM32H723ZE STM32H723ZG

 DS13313 Rev 4

(November 2023)

Table 1. STM32H723xE/G features and peripheral counts

Current:

ImenD_0-1736168418878.png

 Expected :

- Remove unused "Present in IC"

- Separate Operational Amplifier and Comparator instance count from 12-bit DAC peripheral row.

 

ImenD_1-1736168418879.png

Dec 2024

Pin descriptions


 

 

STM32L053C6 STM32L053C8 STM32L053R6 STM32L053R8

DS10152 Rev 9

(June 2019)

Table 15. STM32L053x6/8 pin definitions

Current:

For UFQFPN48: The pins are labeled incorrectly from pins 2 to 6 (pins are wrongly shifted down) and there is no pin 7. 

Expected :

For UFQFPN48, correct the pins number and add pin 7.  

Dec 2024

STM32H7B0xB

DS13196 - Rev 7

(May 2022)

Table 14. Port G alternate functions

Current:

Alternate FMC Information missing for PG15.

Expected :

Add FMC_SDNCAS alternate function for PG15.

Dec 2024

STM32H7B0xB

DS13196 - Rev 7

(May 2022)

Table 7. STM32H7B0xB pin/ball definition

Current:

PG1 is FT_h2

Expected :

PG1 must be FT_ah2 due to OPAMP2_VINM analog additional function.

Dec 2024

STM32U5Gxxx

DS14102 Rev 2

 (Nov 2024)

Table 27. STM32U5Gxxx pin/ball definitions

Expected:

Add this note for pins name PF7, PF8, PH13, PH14, PA11, PA12, PD0, PD1, PB8, PB9:

    7. The WLCSP208 package do not support FDCAN

Dec 2024

Pinouts, pin description

and alternate functions

 

 

 

 

 

 

 

STM32H523xx

DS14540 Rev2

(Nov 2024)

Figure 11. UFBGA144 ballout

Expected:

Replace M12 by VSS in figure 11

Jun 2024

STM32G071x8/xB

DS12232 Rev 4

(Sep 2021)

Table 12. Pin assignment and description

Current:

Note 3:

3. Upon reset, a pull-down resistor might be present on PB15, PA8, PD0, or PD2, depending on the voltage level on PB0, PA9, PC6, PA10, PD1, and PD3. In order to disable this resistor, strobe the UCPDx_STROBE bit of the SYSCFG_CFGR1 register during start-up sequence.

Expected:

3. Upon reset, a pull-down resistor might be present on PA8, PB15, PD0, or PD2, depending on the voltage level on PA9/PC6, PA10/PB0, PD1, and PD3, respectively. In order to disable this resistor, strobe the UCPDx_STROBE bit of the SYSCFG_CFGR1 register during start-up sequence.

Nov 2024

I/O port characteristics

STM32H523xx

DS14540 Rev2

(Nov 2024)

Figure 20. VIL/VIH for all I/Os except BOOT0

Current:

ImenD_2-1733425318876.png

Expected: 

ImenD_3-1733425318879.png

Jun 2024

Electrical

characteristics

 

 

STM32G491xC STM32G491xE

DS13122 Rev4

(Apr 2024)

5.2 Absolute maximum rating

Current:

The phrase "Exposure to maximum rating conditions for extended periods may affect device reliability" mentioned twice on the first lines of the Paragraph 5.2.

Expected:

Keep only one phrase.

Sep 2024

RTC

STM32H735xG

DS13312 Rev4

(Nov 2023)

Table 31. "Typical and maximum current consumption in Standby mode" 

Current:

The max values are present for “RTC and LSE” ON

Expected:

The max values for “RTC and LSE” should be placed for “RTC and LSE” OFF

Aug 2024

 

USART

/

UART

 

 

STM32H533xx

DS14539 Rev2

(Nov 2024)

 

 STM32H523xx

DS14540 Rev2

(Nov 2024)

Figure 1. STM32H5XXxx block diagram

Current:

ImenD_4-1733425318882.png

Expected:

For USAR1, USART2, USART3, UART4, UART5, USART6 :

Update RTS by RTS_DE

Jun 2024

TIM

 

 

 

 

STM32H757xI

DS12931 Rev3

(Mar 2024)

Tables "Port B alternate functions" and "Port H alternate functions”

Current:

TIM12 AFs are missing in the tables "Port B alternate functions" and "Port H alternate functions" and should be mapped in the AF2

Expected:

Add TIM12 AFs in the tables "Port B alternate functions" and "Port H alternate functions" and should be mapped in the AF2.

Aug 2024

 STM32U545xx DS14216 Rev4

(Dec 2023)

 

STM32U535xx

DS14217 Rev 4

(Dec 2023)

 

STM32U5Axxx

DS13543 Rev 2

(Jul 2023)

 

STM32U59xxx

DS13633 Rev 2

(Jul 2023)

 

STM32U5Gxxx

DS14102 Rev 2

(Nov 2024)

 

STM32U5Fxxx DS14395 Rev 2

(Nov 2024)

 

STM32U585xx

DS13086 Rev 10

(Jul 2024)

 

STM32U575xx

DS13737 Rev 10

(Jul 2024)

Table xxx. WWDG min/max timeout value at 160 MHz (PCLK)

Expected:

Correct values for WDGTB = 6 

  • Prescaler : replace 46 by 64
  • Min timeout value: 1.177 by 1.638
  • Max timeout value: replace 75.366 by 104.858

Nov 2024

TAMPER

STM32H742xI
STM32H742xG STM32H743xI
STM32H743xG

DS12110 Rev10

(Mar 2023)

Table 2. STM32H742xI/G and STM32H743xI/G features and peripheral counts

Current:

The wakeup pins and tamp pins of STM32H743AI are inverted.

  • Tamper pins : 5     
  • Wakeup pins : 2

Expected : 

Replace by :

  • Tamper pins : 2
  • Wakeup pins : 5

Apr 2024

Operating conditions

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

STM32H742xI
STM32H742xG STM32H743xI
STM32H743xG

DS12110 Rev10

(Mar 2023)

Table "General operating conditions" located in sections:

- Electrical characteristics (rev Y)

- Electrical characteristics (rev V) sections

Expected: 

Remove "Ambient temperature for the suffix 3 version" line.

Apr 2024

STM32G031x4

/x6/x8

DS12992 Rev3

(Oct 2021)

Table. Current consumption in Standby mode

Current:

ULPEN = 0

 Expected: 

Replace the ULPEN = 0 by ENB_ULP=0.

May 2024

STM32G041x6

/x8

DS12993 Rev3

(Oct 2021)

STM32G071x8

/xB

DS12232 Rev4

(Sep 2021)

STM32G051x6

/x8

DS13303 Rev3

(Nov 2021)

STM32G061x6

/x8

 DS13513 Rev3

(Nov 2021)

STM32G081xB

DS12231 Rev4

(Sep 2021)

STM32U083xC

DS14463 Rev2

(Mar 2024)

 

 

STM32U073xx

DS14548 Rev2

 (Mar 2024)

Table 40. Current consumption in Stop 2 mode

Current:

For “LCD disabled” condition:

- EN_ULP = 0

- EN_ULP = 1

Expected:

For “LCD disabled” condition:

- EN_ULP = 1

- EN_ULP = 0

Jun 2024

Table 41. Current consumption in Standby mode

Current:

For “No independent watchdog” condition:

- EN_ULP = 0

- EN_ULP = 1

Expected:

For “No independent watchdog” condition:

- EN_ULP = 1

- EN_ULP = 0

Jun 2024

Table 42. Current consumption in Shutdown mode

Expected:

Remove in Conditions column: EN_ULP = 0

Jun 2024

STM32L053C6 STM32L053C8 STM32L053R6 STM32L053R8

DS10152 Rev 9

(June 2019)

Table 68. Comparator 1 characteristics

Expected :

Remove rows for parameters R400k and R10k.

Dec 2024

FMC

 

 

STM32H523xx

DS14540 Rev2

(Apr 2024)

FMC characteristics section

Current:

Missing Figure “Asynchronous multiplexed PSRAM/NOR write waveforms”

Expected: 

Add this figure.

ImenD_11-1733425318916.png

Jun
2024

STM32H723VE STM32H723VG STM32H723ZE STM32H723ZG

 DS13313 Rev 4

(Nov 2023)

FMC characteristics section

Current:

Missing Figure “Asynchronous multiplexed PSRAM/NOR write waveforms”

Expected: 

Add this figure:

ImenD_2-1736169142200.png

Dec 2024

STM32H7S3x8 STM32H7S7x8

DS14359 Rev4

(Nov 2024)

SDRAM waveforms and timings

 

Expected:

In all timing tables, Tfmc_ker_ck is the fmc_ker_ck clock period, with the following FMC_SDCLK maximum values:

  • For 2.7 V<VDD<3.6 V: maximum FMC_CLK = 125 MHz at 20 pF
  • For 1.71 V<VDD<1.9 V: maximum FMC_CLK = 95 MHz at 20 pF
  • For 1.71 V<DD<1.9 V: maximum FMC_CLK = 100 MHz at 15 pF 

Aug 2024

STM32H7R3x8 STM32H7R7x8

DS14360 Rev3

(Mar 2024)

Aug 2024

 

ADC

 

 

 

 

 

STM32H503xx

DS14053 Rev4

(Oct 2024)

"12-bit ADC characteristics" section

Current:

"Unless otherwise specified, the parameters given in Table xx are derived from tests performed under the ambient temperature, fPCLK2 frequency and VDDA supply voltage conditions summarized in Table yy"

Expected:

Replace "fPCLK2 frequency" by "fHCLK frequencyfrom the first paragraph in the "12-bit ADC characteristics" section.

Mar 2024

STM32H742xI
STM32H742xG STM32H743xI
STM32H743xG

DS12110 Rev10

(Mar 2023)

"16-bit ADC characteristics" sub sections located in sections:

- Electrical characteristics (rev Y)

- Electrical characteristics (rev V) sections

Current:

"Unless otherwise specified, the parameters given in Table xx are derived from tests performed under the ambient temperature, fPCLK2 frequency and VDDA supply voltage conditions summarized in Table yy: General operating conditions".

Expected:

Replace "fPCLK2 frequency" by "fHCLK frequency"from the first paragraph.

Mar 2024

STM32H753xI

DS12117 Rev9

(Mar 2023)

Mar 2024

STM32H750VB STM32H750ZB STM32H750IB STM32H750XB

DS12556 Rev7

(Mar 2023)

Mar 2024

STM32H735xG

DS13312 Rev4

(Nov 2023)

Mar 2024

STM32H735xG 

DS13312 Rev4

(Nov 2023)

Table 89. 12-bit ADC accuracy

Current:

ImenD_12-1733425318919.png

Expected:

EG Typical = +/-2 LSBs

EG Max = +/-5 LSBs

May 2024

STM32H742xI
STM32H742xG STM32H743xI
STM32H743xG

 DS12110 Rev10

(Mar 2023)

Figure 1. STM32H742xI/G block diagram

 

 

Figure 2. STM32H743xI/G block diagram

Current:

In Figure 1. STM32H742xI/G block diagram:

1- Up to 20 analog inputs common to ADC1 & 2.

2- Up to 17 analog inputs common to ADC1 and 2

Expected: 

To replace by:

1- Up to 20 analog inputs

 Most are common to ADC1 & 2

2- Up to 17 analog inputs

Some common to ADC1 and 2

Apr
2024

STM32H747xI
STM32H747xG 

DS12930 Rev2

(Mar 2023)

Figure 1. STM32H747xI/G block diagram

Apr
2024

Memory

STM32H523xx

DS14540 Rev2

(Nov 2024)

 

STM32H533xx

DS14539 Rev2

(Nov 2024)

Table . Dynamic characteristics: eMMC characteristics, VDD = 1.71 to 1.9 V

Current:

- The max value for Output valid time HS: 7/5

- Footnote (3). When using PB13 and PB14

Expected:

- For Output valid time HS, replace the max value '7/5' by 7/75'

- Replace the footnote (3): " When using PB13 & PB14" by "When using PB13"

Jun
2024

DCMI

 

 

STM32U5Axxx

DS13543 Rev2

(Jul 2023)

Digital camera interface (DCMI)

Current:

The DCMI is a synchronous parallel interface able to receive a high-speed data flow from an external 8-, 10-, 12- or 14-bit CMOS camera module. It supports different data formats: YCbCr4:2:2/RGB565 progressive video and compressed data (JPEG).

Expected:

The digital camera is a synchronous parallel interface able to receive a high-speed data flow from an external 8-, 10-, 12- or 14-bit CMOS camera module. It supports different data formats: YCbCr4:2:2/RGB565 progressive video and compressed data (JPEG).

Oct 2024

 

 

USB

 

STM32C071x8/xB

DS14693 Rev 1

(Sep 2024)

3.20 Universal serial bus device (USB) and host (USBH)

Current:

It requires a precise 48 MHz clock that is generated from the internal high-speed external clock source or by the internal 48 MHz oscillator in automatic trimming mode.

Expected:

It requires a precise 48 MHz clock that is coming from a high-speed external clock (from an external source or an oscillator) or by the internal 48 MHz oscillator in automatic trimming mode.

Nov 2024

STM32F373xx

D022691 Rev7

(Jun 2016)

Table 12. Alternate functions for port PA.

Current:

Missing USB mapped on PA11-PA12 as AF14 

Expected:

Add USB mapped on PA11-PA12 as AF14.

Apr
2024

Package information

 

 

 

 

 

 

 

STM32C071x8/xB

DS14693 Rev 1

(Sep 2024)

Table 79. Thermal resistance

Current:

 Values for UFQFPN28 package: TBD

Expected:

Add values for UFQFPN28 package:

- Thermal resistance junction-ambient: 59

- Thermal resistance junction-board: 23.8

- Thermal resistance junction-case: 26.8

Nov 2024

 

Version history
Last update:
‎2025-01-30 5:12 AM
Updated by: