FAQs
cancel
Turn on suggestions
Auto-suggest helps you quickly narrow down your search results by suggesting possible matches as you type.
Showing results for 
Search instead for 
Did you mean: 

STM32 MCU datasheets: Expected preliminary updates

Imen.D
ST Employee

on ‎2024-06-10 7:00 AM - edited on ‎2025-07-10 6:37 AM by Community manager

Introduction 

This article includes preliminary updates of STM32 MCU datasheets reported since 1st January 2024.  It highlights the current description requiring update and the expected one if available.

The purpose of this article is to deliver any expected updates to our MCU datasheets prior to actual documentation releases. We wish to be transparent with our updates and provide them as fast as possible, to assist you in your design process.
This article is updated on a quarterly basis. Once these preliminary updates are manifested in the datasheets, this article is refreshed with new information.
Moving forward, we are also working on providing datasheet releases on a more frequent basis.

IMPORTANT NOTICE - READ CAREFULLY :

  • STMicroelectronics NV and its subsidiaries (“ST”) reserve the right to make changes, corrections, enhancements, modifications, and improvements to this article at any time without notice.
  • Information in this article supersedes and replaces information previously supplied in any prior versions of this article.
  • The following table gives a quick reference to the preliminary documentation updates which may be changed or improved without notice. 
  • This article will be reviewed on a quarterly basis and applied updates will be removed from the table.
  • The hyperlinks under "Doc Reference - Revision" provides a direct link to the specific document page where the description is located.  

Summary of documentation updates: "STM32 MCU datasheets"

Function

Series (Lines) /
Doc Reference Revision

Update Location

Current Description / 
Expected Description

Date 
of added update

Features and peripheral counts

 

 

STM32F469xx

DS11189 Rev8 (Nov 2023)

Table 2. STM32F469xx features and peripheral counts

Current:

Package for STM32F469Zx : LQPF

Expected:

Package for STM32F469Zx : "LQFP"

Jun 2025

STM32H742xI
STM32H742xG STM32H743xI
STM32H743xG

DS12110 Rev10

(Mar 2023)

Table 2. STM32H742xI/G and STM32H743xI/G features and peripheral counts

Current:

The wakeup pins and tamp pins of STM32H743AI are inverted.

  • Tamper pins : 5     
  • Wakeup pins : 2

Expected: 

Replace by :

  • Tamper pins : 2
  • Wakeup pins : 5

Apr 2024

STM32H753xI

DS12117 Rev 9

(Mar 2023)

 

Table 2. STM32H753xI features and peripheral counts

Current:

Update Note 1

1. SDRAM is not available on LQFP144 package.

Expected : 

1. SDRAM is not available on LQFP100 nor TFBGA100 packages.

Jun 2025

Pin descriptions


 

 

STM32L053C6 STM32L053C8 STM32L053R6 STM32L053R8

DS10152 Rev 9

(June 2019)

Table 15. STM32L053x6/8 pin definitions

Current:

For UFQFPN48: The pins are labeled incorrectly from pins 2 to 6 (pins are wrongly shifted down) and there is no pin 7. 

Expected:

For UFQFPN48, correct the pins number and add pin 7.  

Dec 2024

STM32H7B0xB

DS13196 - Rev 7

(May 2022)

Table 14. Port G alternate functions

Current:

Alternate FMC Information missing for PG15.

Expected :

Add FMC_SDNCAS alternate function for PG15.

Dec 2024

STM32H7B0xB

DS13196 - Rev 7

(May 2022)

Table 7. STM32H7B0xB pin/ball definition

Current:

PG1 is FT_h2

Expected :

PG1 must be FT_ah2 due to OPAMP2_VINM analog additional function.

Dec 2024

STM32H747xI/G

DS12930 Rev 2

(Mar 2023)

Table “Port H alternate functions”

 Expected :

Add the following Alternate functions in the “Port H alternate functions" Table:

- PH6 /AF2 => TIM12_CH1

- PH9 /AF2 => TIM12_CH2

Jun 2025

Pinouts, pin description

and alternate functions

STM32H523xx

DS14540 Rev2

(Nov 2024)

Figure 11. UFBGA144 ballout

Expected:

Replace M12 by VSS in figure 11

Jun 2024

I/O port characteristics

STM32H523xx

DS14540 Rev2

(Nov 2024)

Figure 20. VIL/VIH for all I/Os except BOOT0

Current:

ImenD_2-1733425318876.png

Expected: 

ImenD_3-1733425318879.png

Jun 2024

Electrical

characteristics

STM32G491xC STM32G491xE

DS13122 Rev4

(Apr 2024)

5.2 Absolute maximum rating

Current:

The phrase "Exposure to maximum rating conditions for extended periods may affect device reliability" mentioned twice on the first lines of the Paragraph 5.2.

Expected:

Keep only one phrase.

Sep 2024

STM32U5Gxxx

DS14102 Rev3

(Mar 2025)

Table 80. HSE oscillator characteristics

Expected:

Replace the whole table

KDJEM1_0-1744024288404.png

Mar 2025

 

USART

/

UART

 

 

STM32H533xx

DS14539 Rev2

(Nov 2024)

 

 STM32H523xx

DS14540 Rev2

(Nov 2024)

Figure 1. STM32H5XXxx block diagram

Current:

ImenD_4-1733425318882.png

Expected:

For USAR1, USART2, USART3, UART4, UART5, USART6 :

Update RTS by RTS_DE

Jun 2024

TIM

STM32U5Gxxx

DS14102 Rev 3

(Mar 2025)

 

STM32U585xx

DS13086 Rev 10

(Jul 2024)

 

STM32U575xx

DS13737 Rev 10

(Jul 2024)

 

STM32U5Fxxx

DS14395 Rev 4

(May 2025)

Table xxx. WWDG min/max timeout value at 160 MHz (PCLK)

Expected:

Correct values for WDGTB = 6 

  • Prescaler : replace 46 by 64
  • Min timeout value: 1.177 by 1.638
  • Max timeout value: replace 75.366 by 104.858

Nov 2024

STM32H725xE/G

DS13311 Rev5

(Nov 2023)

Table 5. Timer feature comparison

 

Current:

1. The maximum timer clock is up to 550 MHz depending on theTIMPRE bit in the RCC_CFGR register and D2PRE1/2 bits in
RCC_D2CFGR register.

 Expected: 

The maximum timer clock is up to 275 MHz depending on the TIMPRE bit in the RCC_CFGR register and D2PRE1/2 bits in RCC_D2CFGR register.

Mar 2025

STM32H735xG

DS13312 Rev4

(Nov 2023)

STM32H733VG STM32H733ZG

DS13314 Rev4

(Nov 2023)

Table 4. Timer feature comparison

Operating conditions

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

STM32H742xI
STM32H742xG STM32H743xI
STM32H743xG

DS12110 Rev10

(Mar 2023)

Table "General operating conditions" located in sections:

- Electrical characteristics (rev Y)

- Electrical characteristics (rev V) sections

Expected: 

Remove "Ambient temperature for the suffix 3 version" line.

Apr 2024

STM32U083xC

DS14463 Rev2

(Mar 2024)

 

 

STM32U073xx

DS14548 Rev2

 (Mar 2024)

Table 40. Current consumption in Stop 2 mode

Current:

For “LCD disabled” condition:

- EN_ULP = 0

- EN_ULP = 1

Expected:

For “LCD disabled” condition:

- EN_ULP = 1

- EN_ULP = 0

Jun 2024

Table 41. Current consumption in Standby mode

Current:

For “No independent watchdog” condition:

- EN_ULP = 0

- EN_ULP = 1

Expected:

For “No independent watchdog” condition:

- EN_ULP = 1

- EN_ULP = 0

Jun 2024

Table 42. Current consumption in Shutdown mode

Expected:

Remove in Conditions column: EN_ULP=0

Jun 2024

STM32L053C6 STM32L053C8 STM32L053R6 STM32L053R8

DS10152 Rev 9

(June 2019)

Table 68. Comparator 1 characteristics

Expected :

Remove rows for parameters R400k and R10k.

Dec 2024

STM32F479xx

DS11118 Rev 8

(Nov 2023)

 

STM32F469xx

DS11189 Rev8 (Nov 2023)

Table 45. MIPI D-PHY characteristics

Current:

ImenD_0-1751620841076.png

Expected:

ImenD_1-1751620864116.png

Jun 2025

STM32H503xx

DS14053 Rev4

(Oct 2024)

Table 33. Peripheral current consumption in Sleep mode

Current:

Table name: “Table 33. Peripheral current consumption in sleep mode”

Expected:

Change the name of the table to “Table 33. Peripheral current consumption”

Jun 2025

STM32H755xI

DS12919 Rev2

(Feb 2023)

Figure 16. External components for SMPS step-down converter

Expected:

Add this note to the title “Direct SMPS supply”:

Note :  VOS0 can't be selected in Direct SMPS supply mode

Jun 2025

DS14053 Rev4

(Oct 2024)

Table 31

. Typical and maximum current consumption in Standby mode

 

Table 32. Typical and maximum current consumption in VBAT mode

Expected:

ImenD_0-1751621547700.pngImenD_1-1751621582368.png

 

Jun 2025

STM32H735xG

DS13312 Rev4

(Nov 2023)

Table 31. "Typical and maximum current consumption in Standby mode" 

Current:

The max values are present for “RTC and LSE” ON

Expected:

The max values for “RTC and LSE” should be placed for “RTC and LSE” OFF

Aug 2024

STM32WBA5xxx

DS14127 Rev7

(Dec 2024)

Table 72. EMI characteristics for fHSE = 32 MHz and fHCLK = 100 MHz

Expected:

For the Monitored frequency band: 30 MHz to 130 MHz, replace the value 11 by 21

Jun 2025

STM32WBA5xxx

DS14127 Rev7

(Dec 2024

 

STM32WBA50KG

DS14688 Rev 1

(Sep 2024)

Table. LSI1 oscillator characteristics

Current:

LSIPREDIV

Expected:

Update LSIPREDIV to LSI1PREDIV

Jun 2025

FMC

 

 

STM32H523xx

DS14540 Rev2

(Apr 2024)

FMC characteristics section

Current:

Missing Figure “Asynchronous multiplexed PSRAM/NOR write waveforms”

Expected: 

Add this figure.

ImenD_11-1733425318916.png

Jun
2024

STM32H7S3x8 STM32H7S7x8

DS14359 Rev4

(Nov 2024)

SDRAM waveforms and timings

 

Expected:

In all timing tables, Tfmc_ker_ck is the fmc_ker_ck clock period, with the following FMC_SDCLK maximum values:

  • For 2.7 V<VDD<3.6 V: maximum FMC_CLK = 125 MHz at 20 pF
  • For 1.71 V<VDD<1.9 V: maximum FMC_CLK = 95 MHz at 20 pF
  • For 1.71 V<DD<1.9 V: maximum FMC_CLK = 100 MHz at 15 pF 

Aug 2024

STM32H7R3x8 STM32H7R7x8

DS14360 Rev3

(Mar 2024)

Aug 2024

 

ADC

 

 

 

 

 

 

STM32H503xx

DS14053 Rev4

(Oct 2024)

"12-bit ADC characteristics" section

Current:

"Unless otherwise specified, the parameters given in Table xx are derived from tests performed under the ambient temperature, fPCLK2 frequency and VDDA supply voltage conditions summarized in Table yy"

Expected:

Replace "fPCLK2 frequency" by "fHCLK frequency" from the first paragraph in the "12-bit ADC characteristics" section.

Mar 2024

STM32H742xI
STM32H742xG STM32H743xI
STM32H743xG

DS12110 Rev10

(Mar 2023)

"16-bit ADC characteristics" sub sections located in sections:

- Electrical characteristics (rev Y)

- Electrical characteristics (rev V) sections

Current:

"Unless otherwise specified, the parameters given in Table xx are derived from tests performed under the ambient temperature, fPCLK2 frequency and VDDA supply voltage conditions summarized in Table yy: General operating conditions".

Expected:

Replace "fPCLK2 frequency" by "fHCLK frequency"from the first paragraph.

Mar 2024

STM32H753xI

DS12117 Rev9

(Mar 2023)

Mar 2024

STM32H750VB STM32H750ZB STM32H750IB STM32H750XB

DS12556 Rev7

(Mar 2023)

Mar 2024

STM32H735xG

DS13312 Rev4

(Nov 2023)

Mar 2024

STM32H735xG 

DS13312 Rev4

(Nov 2023)

Table 89. 12-bit ADC accuracy

Current:

ImenD_12-1733425318919.png

Expected:

EG Typical = +/-2 LSBs

EG Max = +/-5 LSBs

May 2024

STM32H742xI
STM32H742xG STM32H743xI
STM32H743xG

 DS12110 Rev10

(Mar 2023)

Figure 1. STM32H742xI/G block diagram

 

 

Figure 2. STM32H743xI/G block diagram

Current:

In Figure 1. STM32H742xI/G block diagram:

1- Up to 20 analog inputs common to ADC1 & 2.

2- Up to 17 analog inputs common to ADC1 and 2

Expected: 

To replace by:

1- Up to 20 analog inputs

 Most are common to ADC1 & 2

2- Up to 17 analog inputs

Some common to ADC1 and 2

Apr
2024

STM32H747xI
STM32H747xG 

DS12930 Rev2

(Mar 2023)

Figure 1. STM32H747xI/G block diagram

Apr
2024

STM32F479xx

DS11118 Rev 8

(Nov 2023)

 

STM32F469xx

DS11189 Rev8 (Nov 2023)

“ADC characteristics” table

Current:

Note 2 in the "ADC characteristics” table

  1. Based on test during characterization

Expected:

Update Note 2 to:

2. When VDDA and VREF+ are supplied by independent voltage sources, it is recommended to maintain the difference between VDDA and VREF+ below 1.8V during the power-up phase.

Jun 2025

Memory

 

STM32H523xx

DS14540 Rev2

(Nov 2024)

 

STM32H533xx

DS14539 Rev2

(Nov 2024)

Table . Dynamic characteristics: eMMC characteristics, VDD = 1.71 to 1.9 V

Current:

- The max value for Output valid time HS: 7/5

- Footnote (3). When using PB13 and PB14

Expected:

- For Output valid time HS, replace the max value '7/5' by 7/75'

- Replace the footnote (3): " When using PB13 & PB14" by "When using PB13"

Jun
2024

STM32U083xC

DS14463 Rev2

(Mar 2024)

 

STM32U073x8/B/C

DS14548 Rev 2

(Mar 2024)

 

STM32U031x4/6/8

DS14581 Rev 2

(Mar 2024)

3.4.2 Embedded SRAM

Expected:

Delete the following sentence from SRAM description :

It is write-protected with a 1-Kbyte granularity.

Jun 2025

USB

 

STM32F373xx

D022691 Rev7

(Jun 2016)

Table 12. Alternate functions for port PA.

Current:

Missing USB mapped on PA11-PA12 as AF14 

Expected:

Add USB mapped on PA11-PA12 as AF14.

Apr
2024

Package information

 

 

 

 

 

 

STM32F410x8 STM32F410xB

DS11144 Rev7

(Jan 2025)

Table 79. UFQFPN48 – Mechanical data

Current:

Missing A3 dimension.

Expected:

KDJEM1_1-1744020786594.png

Mar 2025

STM32H753xI

DS12117 Rev 9

(Mar 2023)

 

STM32H755xI

DS12919 Rev2

(Fev 2023)

 

STM32H745xI/G

DS12923 Rev 2

(Mar 2023)

 

STM32H747xI/G

DS12930 Rev 2

(Mar 2023)

Figure . TFBGA240+25 - Outline

Expected:

In the Figure. TFBGA240+25 – Outline:

Replace “S” at the bottom of the figure by “U”

 

ImenD_0-1751620965088.png

 

 

 

Jun 2025

Memory mapping

STM32F405xx STM32F407xx

DS8626 Rev10

(Nov 2024)

Figure 18. STM32F40xxx memory map

Current:

 AHB1 starting address is 0x4002 000

Expected:

 AHB1 starting address is 0x4002 0000

Mar 2025

GPIO

STM32WBA6xxx

DS14736 Rev2

(Feb 2025)

3.14 General-purpose input/output (GPIO)

Current:

 Missing " GPIO using PD6 and PD7" section

Expected:

 Add section:

3.14.1 GPIO using PD6 and PD7
PD6 and PD7 provide USB OTG_HS functions, but they cannot be used for any other function, including GPIO. When USB OTG_HS is not used, PD6 and PD7 must be kept in analog mode.

Mar 2025

 

Version history
Last update:
‎2025-07-10 6:37 AM
Updated by:
Community manager
Top