Ask questions on STM32CubeMX. Discuss code generation and configuration challenges, among other topics.
We are pleased to announce that version 6.17.0 of STM32CubeMX is available. What is new in 6.17.0: Added support for new microcontrollers across the STM32WBA, STM32H5, and STM32U3 seriesAdded support for new boards: NUCLEO-WBA25CE1, NUCLEO-H5E5ZJ, ST...
Dear all,I found an interesting effect using the CubeL4 and CubeMX generated files for a STM32L496 and use ADC1 and ADC3 (not simultaneously):What we do:We turn the ADCs on only when we sample data, otherwise they are turned off. To turn the ADC off,...
When configuring the LTDC Layer Settings for an STM32N6 chip in CubeMX, the Layer 0 - Color Frame Buffer Start Address is missing: This parameter is available with other chips, such as STM32F750:
Hi! I'm working on setting up FDCAN communication using the STM32N6570X0-Q Nucleo Board. However, when I try to modify the bit timing parameters—such as the Nominal Prescaler, Nominal Time Seg1, or Seg2—the baud rate doesn't seem to change regardless...
The data sheet for the G474RE says it has a Memory Protection Unit. The article on how to enable/configure it in STM32CubeMX shows a CORTEX_M# node under "System Core". I don't see that node. Thank you.
There are 4 external events that can be chosen to trigger and reset individual counters of each HRTIM timer unit in STM32H743 MCU. CubeMX shows those events once the Event Configuration is chosen "Enabled" . Yet only Source 1 is active (allowed to be...
Hi,when selecting the STM32C051K8 in Cube MX it seems that CubeMX has wrong configs/specs about it?As you can see from the screenshot below it shows it is a LQFP package but - unless I missed something - it is supposed to be a UFQFPN32 package.The ma...
Split from The MCU selector cannot be opened, but the board selector can be opened normally.That issue is confirmed as solved; so this is a different issueI had exactly the same issue and could be solved by removing xcubeai.But it's confusing while r...
HiAccording to the reference manual the high-cycle capable Flash of a STM32H562 is mapped to the address 0x0900_0000 to 0x0901_7FFF. The Memory Management Tool of CubeMX does not allow me to generate a Region in this address range (see Error below). ...
In STM32CubeMX, here is the orientation for a chip with a red dot marking pin 1 at the top left when text reads from left to right.In real life, here is the orientation for a chip with a red dot marking pin 1. As far as I'm aware, all STM32 chips are...
Hello,For one of my project, my goal is to use PTP to synchronise multiple STM32H563 to one host.However, when configuring the ETH Device, I can only enable RMII, as the "RMII_PTP_SYNCHRO" is greyed out.I've read the pop up that tells me to enable TI...
