STM32 MCUs

Hi,Chip: STSPIN32G0602Q (STM32G031 core + integrated 3-phase gate driver)Board: custom BLDC driver board, powered via 115VAC through an isolation transformer into the board's own AC input; the board's onboard PFC/rectifier stage converts this to the internal DC buses (HV+ ~400V DC bus, and VBUS ~50-120V DC, which is the rail actually switched by the MOSFETs under test)Purpose of this test: end-of-line (EOL) production test — statically turning on one high-side MOSFET and one low-side MOSFET on different phases (e.g. U-high + V-low) for a short, controlled period, then checking output voltage/current, to verify each MOSFET pair switches correctly before the board ships. This is a functional pass/fail check, not normal motor operation — no continuous PWM switching or motor commutation is involved.Problem: TIM1's gate outputs never turn on. Root cause traced to: BIF (break flag) is always set, so MOE can never be enabled.What happensI start a TIM1 channel (HAL_TIM_PWM_Start + HAL_TIMEx_PW

Heyho,I’m confused - or the STM32G431KBU (in QFN32) is…I’m using ADC 1 with 2 external inputs, PA0, PA1, and the internal “REFI” and temperature channel “TEMP”.All running with continuous and circular DMA in the background, no interrupts. If I need an ADC value, I simply grab it from the ADC DMA buffer.This is basically working, except for the channel sequence. Which I set manually, but have at least triple-checked the SQR1 / SQR2 values with the RM... If I set up the channel sequence in ADC1->SQR1 in the order: PA0, PA1, REFI, TEMP, then I find in the DMA buffer instead of this order: 0, PA0, REFI, TEMP→ so PA0 was “shifted”, PA1 is nowhere to be found (it is not 0, checked the GPIO via scope). If I add and insert a dummy channel “VDMY” as the first in the sequence, so that the sequence should result in VDMY, PA0, PA1, REFI, TEMP, I find this order in the DMA buffer:PA1, VDMY, PA0, REFI, TEMPAt least I get all the channels now, the measurement data is correct. So, what am I messing

so this is my data acquisition system, i want you to suggest some improvements in it. as the adc + dma ping pong buffer is working fine, but after that the conversion and its transmission via dma+uart ping-pong buffer is so much miserable. there is no synch between these buffers.here is my project:Vishwas1523/dataAcquisitionSystemPS: i am using stm32 nucleo f446re

Hello everyone,Actually I am making a data acquisition system in which my mcu takes analog data from a sensor and stores it in a buffer, and then into a 2nd buffer with the help of DMA in double buffer mode. Now i want to transfer this data via UART to my screen with the help of PuTTY with the same ping-pong architecture. For this i need to convert 12 bit adc value to data suitable for uart (8 bit). which i do with the help of a function without any issue and then store them in different two buffers. now the thing is that i want a system in which when buffer 1 is being filled by adc, buffer two will be transferred by uart and vice versa, now the main problem is that there is no sync between the buffers and the ownership. and it is mostly due to the conversion and size of buffers (uart buffers are twice the size of adc buffers) as i am using double buffer transmission mode in DMA controllers of both adc and uart.So do you think i should use single buffer transmission with circular buffe

Hello ST Team,I am evaluating the secure boot and secure firmware update solutions for the STM32H5 family and plan to implement OEMuRoT  on an STM32H5F4 device.While reviewing the wiki article OEMiRoT OEMuRoT for STM32H5, I noticed that the STM32H5F4xx is not listed as a supported device family.Security:OEMiRoT OEMuRoT for STM32H5 - stm32mcuI would like clarification on the following points:Is STM32H5F4xx intentionally excluded from OEMuRoT support? Are there any hardware or security-feature limitations in STM32H5F4 that prevent OEMuRoT implementation? My target device is STM32H5F4, and I am planning a secure firmware update architecture based on Root of Trust and authenticated firmware updates. Any guidance or roadmap information would be appreciated.  Thank you,             RJ

Hello ST Team,We are evaluating STM32TRUSTEE-SM (Secure Manager) on STM32H5F4 devices and would like clarification regarding the external flash support architecture.From the STM32TRUSTEE-SM documentation and wiki pages, we understand that:Secure Manager provides an External Flash Profile.An External Flash Driver is referenced as part of the Secure Manager configuration flow.External firmware and data confidentiality can be enabled through OTFDEC.OTFDEC-based secure external memory access is described together with the OCTOSPI peripheral.Secure Manager supports firmware download slots located in external flash memory.However, we need clarification on the supported external memory architecture and driver model.Questions1. External Flash Interface Support restricted to memories connected through the OCTOSPI peripheral, or are other                  external memory interfaces also supported? Specifically, does the External Flash Profile support:     Octal SPI NOR Flash, Quad SPI NOR Flash,

Hi ST Community, I’ve connected a MP23DB01HPTR MEM MIC to the STM32N6 Nucleo’s MDF1_SDI3 and MDF1_CCK0 and here is my connection.   I am using“ Projects/STM32N6570-DK/Examples/MDF/MDF_AudioRecorder” as a reference and according to the information on Github, the CCK0 should be 2.048 MHz Which I am measuring almost the same frequency on the CCK0 pin of my board : 2.03393 MHz  In my project, instead of sending the data to SAI, I am sending the data to USART 1, which I’ve set the BaudRate to 921600. My code has three callback functions:void HAL_MDF_AcqHalfCpltCallback(MDF_HandleTypeDef *hmdf)void HAL_MDF_AcqCpltCallback(MDF_HandleTypeDef *hmdf)void HAL_UART_TxCpltCallback(UART_HandleTypeDef *huart) The USART 1 is sending the first half of the MDF buffer when the AcqHalfCpltCallback is triggered, and then the second half when the AcqCpltCallback is triggered. on my computer I wrote a python script  where it is receiving the audio raw data via serial port and save it into a WAV file. However

Can anyone please pint me out to a BSDL file useful for STM32H7A3VIH6Q ? Thank youGabriele

Hi,On STM32U575CGU3, I see a reproducible +200 µA increase in current after calling MX_ADC1_Init() once. Even after HAL_ADC_DeInit(), ADC reset, and disabling VddA, the additional current does not return to the original baseline.Here is the minimal code:cint main(void){ HAL_Init(); SystemClock_Config(); MX_GPIO_Init(); MX_GPDMA1_Init(); MX_ADC1_Init(); // +200uA increase MX_OCTOSPI1_Init(); MX_SPI1_Init(); MX_USB_OTG_FS_PCD_Init(); MX_USART1_UART_Init(); MX_ICACHE_Init(); // ADC Disable HAL_ADC_DeInit(&hadc1); __HAL_RCC_ADC1_FORCE_RESET(); __HAL_RCC_ADC1_RELEASE_RESET(); HAL_PWREx_DisableVddA(); while (1) { __NOP(); }}Questions Has anyone observed similar behavior on U5 devices (ADC bias or VREFBUF staying active after initialization)? Are there known conditions where ADC/VREFBUF analog blocks remain powered even after DeInit and VddA OFF? Any hints on additional steps required to fully shut down the analog domai

Hello Everyone,I have a two arduino boards communicating with each other on a CAN Bus. Arduino is connected to CAN Bus via MCP2515 .Both arduino are communicating correctly with each other. Here is an example of my transmitter on arduino:/*************************************************/#include <SPI.h>#include <mcp2515.h>/*******************MESSAGES DEFINITIONS*****************/#include <SPI.h>#include <mcp2515.h>struct can_frame canMsg1;struct can_frame canMsg2;MCP2515 mcp2515(10);void setup() { canMsg1.can_id = 0x0F6; canMsg1.can_dlc = 8; canMsg1.data[0] = 0x8E; canMsg1.data[1] = 0x87; canMsg1.data[2] = 0x32; canMsg1.data[3] = 0xFA; canMsg1.data[4] = 0x26; canMsg1.data[5] = 0x8E; canMsg1.data[6] = 0xBE; canMsg1.data[7] = 0x86; canMsg2.can_id = 0x036; canMsg2.can_dlc = 8; canMsg2.data[0] = 0x0E; canMsg2.data[1] = 0x00; canMsg2.data[2] = 0x00; canMsg2.data[3] = 0x08;

Hello Team,We have manufactured 500 boards using STM32WBA52CGU6. During testing, we tested 50 boards, out of which 5 boards are not advertising BLE, while the remaining 45 boards are working normally.We have attached the schematic and PCB layout screenshots for your reference.Our PCB is a 2-layer board, and we have not followed a controlled 50 Ω impedance for the RF trace. Could this be contributing to the BLE advertising issue on these 5 boards?Could you please review the attached schematic and layout and help us debug this issue? We would also appreciate your guidance on the key parameters or measurements we should checkon the failed boards compared with the working boards.

I have two boards, one with STM32F303 with CAN 2.0 and a new board (same electronic, only MCU is different) with STM32G474. Software is identical too, except for the CAN/FDCAN. So I had to migrate the software from CAN 2.0 to FDCAN Classic in order to communicate with the other system boards. In the treatment of the received frames, I noticed that the CAN 2.0 is faster in managing the communication than the FDCAN Classic. Can anyone confirm that ? and if so why does it take so long to the FDCAN classic ? As I send frames to both board, the STM32F303 program timing isn't affected, for the STM32G474 I measured a delay of some ms. Clocks are as follow:STM32F303 : CPU: 72 Mhz CAN baudrate: 500Kb/sSTM32G474 : CPU: 170 Mhz FDCAN classic baudrate: 500kb/s

Hello everyone!   I got the following problem; I need to read from two 32bit addresses and write the data to three. Specifically, i am interested in the case shown in the left side of the image, where the N[0:15] increment by half word and write to the M[0:15] but it will increment by a full word. Don't worry about the reserved bytes in the HTIMx_CC1R, I checked the manual and are always at zero.  I saw that the H7 can read/write with weird patters using the fifo functionality. The thing is I can't understand at all how to set it up. Is there any other better way?   Thanks in advance!  

hi there.I'm trying to CAN transmit on my target board.my board is not to send CAN message on stm32cubeide . but I confirmed that my board send CAN message on mbed.Can I how to send CAN message on stm32cubeide?? I intended CAN baudrate 500kbps, sampling point 75% and my apb1 clock is 18Mhz, HSE is 8Mhz, and my crystal is 8Mhz.below is printf() debug message when my board running and stop.Always debug message show me the message such as below..<Can Send Success: 1<Can Send Success: 2<Can Send Success: 3<Can Send Success: 4<Can Send Success: 5<Can Send Success: 6<Can Send Success: 7<Can Send Success: 8<Can Send Success: 9<Can Send Success: 10<Can Send Success: 11<Can Send Success: 12<Can Send Success: 13<Can Send Success: 14<Can Send Success: 15<Can Send Success: 16<Can Send Success: 17<Can Send Success: 18<Can Send Success: 19<Can Send Failmy source code attached .please check my error...regards..

Hi all,I have a CAN 2.0 network up and running with a F407 and some F103. I added a board with a G0B (fdcan). I couldn't get my hands on a FDCAN-tranceiver. I tried to get it working in classic mode (from repository example) with a CAN2.0 tranceiver. I cannot receive any message.So my question is:Is it even possible to configure the G0B to work with a classic CAN2.0 tranceiver?If yes, what would the FDCAN config look likeThank you in advance!Best regards,Philipp