STM32CubeMX (MCUs)

When configuring multiple FDCAN instances in CubeMx, the clock divider settings are not synchronised and are generated twice. For me, FDCAN1 clock divider has the drop down box with multiple options.FDCAN2 only has the "Divide kernel clock by 1" option. This should match FDCAN1 as one common clock divider value. "The clock is common to all FDCAN instances. This parameter is applied only at initialisation of first FDCAN instance." from UM2570.The first issue is within CubeMx, this clock divider value is then used for the indicator calculations:- Nominal Time Quantum- Nominal Time for One Bit- Nominal Baud RateIf the clock values are wrong, these values will be wrong.Second issue is the Init.ClockDivider code is generated twice, one per instance instead of just once.If these values are the same, there'll be no issue. If different then the latter will overwrite the former. In main.c MX_FDCAN1_Init(); MX_FDCAN2_Init(); in fdcan.c void MX_FDCAN1_Init(void) { /* USER CODE END FDCAN1_Init 1

There are 3 bugs reported here:Bug 1:In the FileX parameters GUI, under SRAM Disk Driver: The range for the "SRAM Disk Size" is wrong.  The Address space allows for 256MBytes, not 256KBytes.Workaround - After CubeMX regenerates the code, I have to change the #define manually in the code.Seems to work on my board with 64Mb, (in the example below I have the base address set to C0200000 and using the upper 32MB)Bug-2Under "Software Packs", when we select "LevelX NOR custom inferface", CubeMX doesn't seem to do anything.  We are unable to select the "File System Interface" in the parameters table:If you unselect the LevelX QuadSPI memory interface,The majority of the configuration parameters in LevelX disappear, but is left with an unselectable option (MT25TL01GBug-3Since the Custom driver option does not work in CubeMX, we tried to modify the QSPI driver with the MT25TL01G component.  The problem is there are no    " USER COMMENT" sections in the entire file, so w

Hello,the STM32G474RBTx CubeMX Clock Configuration ADC1_2 and ADC3_4_5 are swapped - the ADC1_2 Mux is actually referring to the ADC3_4_5 Mux, at least when it comes to the subsequent divider options in the respective ADC configurations.Setting ADC12 Mux to PLLP with e.g. 48.57 MHz allows me to put ADC3_4_5 into ASYNC_DIV_1, whereas the ADC3_4_5 Clock Mux is set to SYSCLK with 170MHz. ADC12 cannot use ASYNC_DIV_1 or 2, even though they should be able to.It also happens the other way around.I am using CubeMX 6.17.0 with the G4 package version 1.6.3

Hello EveryoneI am using CubeMX 6.17.0 and Embedded Software Package STM32H5 1.6.0:Is there a control missing to setup "Trigger Output (TRGO) Parameters?  In comparison to e.g. Tim15:   

I'm using STM32CubeMX 6.17.0 with NUCLEO-U575ZI-Q, it generated the following code:/* Initialize COM1 port (115200, 8 bits (7-bit data + 1 stop bit), no parity */ BspCOMInit.BaudRate = 115200; BspCOMInit.WordLength = COM_WORDLENGTH_8B; BspCOMInit.StopBits = COM_STOPBITS_1; BspCOMInit.Parity = COM_PARITY_NONE; BspCOMInit.HwFlowCtl = COM_HWCONTROL_NONE;The comment is wrong, the UART has 8 bits of data instead of 7 bits.

  i am installed cube-MX for linux laptop version (6.17.0) and cube-IDE is (Version: 2.1.1) .For MX it shows option only generlic linux  so it is correct for linux laptop ? and for IDE is debian is fine . I refer you tube sessions for Example import in that STM32IDE option availbale as toolchain but in my system sometimes not shows . Can you please give me exact steps how can i use Mx with IDE in detail steps for import examples given by stm32 also how can i create and import new example also .  Also i have board STM32-NUCLEO-F746ZG when i import example in MX sometimes board is not visible .For toolchain selection below options are availble in that STM32IDE is invisible .  

When generating a CMake-based STM32 project, STM32CubeMX currently lists every single .c source file manually in CMakeLists.txt. This brings major inconvenience for users:When adding user drivers (e.g., sensor, flash, display, or custom modules), users must manually edit CMakeLists.txt and add each new .c file path.If the user adds many source files, this process is error-prone and inefficient.It does not match modern CMake project practices and reduces project maintainability. Suggestion:Please use file(GLOB_RECURSE ...) to automatically include source files from standard directories such as:Core/Inc/*.hCore/Src/*.c

Hi all,I'm running standalone STM32CubeMX on Debian and I'm having trouble generating a complete project. No matter what I do, code generation only produces three items:- led_test.ioc- Inc/ folder- Src/ folder I'm expecting a full project structure including Core/, Drivers/, startup files, and a .launch file for STM32CubeIDE.Steps I've already tried:1. Selected the NUCLEO-F334R8 from the Board Selector (not the MCU).2. Clicked Yes to initialize all peripherals with default settings.3. In the Project Manager tab, set the Toolchain / IDE to STM32CubeIDE before generating.4. Clicked Generate Code — same incomplete output every time.Has anyone run into this on Debian? Is this a known bug with the standalone CubeMX on Linux, or am I missing a step? Any advice appreciated.ThanksI've attached screenshots of my CubeMX configurations settings below:   

Hi there, im using Nucleo-F446RE , ST HAL and CubeMX, and im learning to configure the clockI use HSE Bypass mode (MCO from the st-link in the nucleo), everything perfect hereIn the RM i found out that, when using HSE BYPASS mode, PH1 (OSC_OU) should be left in HI-Z state What does HI-Z means in STM32 MCUs? does it mean configuring the pin as digital input? or it means configuring the pin as analog input?Or it depends?   When selecting HSE BYPASS MODE the chip image in the .ioc file gets set like this: But if i try to  set PH1 (OSC_OUT) as GPIO a conflict is generated, so, how can i set the state of PH1 as HI-Z?   Also, why does PH1 gets reserved and configured in the chip as OSC_OUT? is this to avoid configuring it as another thing?And finally, what it seems very weird to me, why the clock por GPIOH is enabled when CubeMX generates the code if i cant use PH1 as a normal GPIO? (im not using any other PHx PIN)   Thanks in advance and sorry for the english, not a n

With the recent split of STM32CubeIDE and STM32CubeMX, I'd like to propose a dark mode option be added to STM32CubeMX.In consideration of the competing priorities for STM's software development team, I have two suggestions for how this proposal could be implemented:The first suggestion is the typical route: STM's in-house software development team add the UI theming and inputs to switch between dark and light mode.The second suggestion is less typical: make STM32CubeMX open source and let the larger software community assist with adding dark mode. Perhaps the source could be placed alongside other repositories in STM's current GitHub account....The benefits of adding such an option would be as follows:Consistency with STM32CubeIDE, from which STM32CubeMX was split from (STM32CubeIDE already has a dark mode)Consistency with the vast majority of other software in the industryConsistency with what has become a common user experience across operating systems, browsers, and setups in g

Hello, I'm trying to configure my SAI to receive TDM packets from my external ADC. For some reason, no matter what sample rate I choose, the real audio and error between selected is always 0. I've tried changing the clocks to the SAI1 module to 50 and 100 MHz, but it didn't change anything. Is this a visual bug with CubeMX or is it something with how I'm configuring the peripheral? Thanks.  

missing --start-group around WBA2_LinkLayer_BLE_Full_lib.EnvironmentSTM32CubeMX version: 6.17.0STM32CubeWBA firmware package: 1.9.0Target device: STM32WBA25CG (NUCLEO-48 board)Toolchain: GNU Tools for STM32 14.3.1+st.2 (arm-none-eabi-gcc/ld)Build system: CMake (toolchain selected via "CMake" in CubeMX project settings)Host OS: Windows 11Steps to reproduceCreate a new STM32CubeMX project for STM32WBA25 (NUCLEO board).Enable BLE (peripheral role, BLE_Full stack).In Project Manager → Toolchain/IDE, select CMake.Generate code.Build with the generated CMakeLists (e.g. cube-cmake --build build/Debug).Expected Build links cleanly.Actual Link fails with:ld.exe: stm32wba_ble_stack_full.a(le_ctrl.o): in function `LECTRL_LL_Init': le_ctrl.c:(.text.LECTRL_LL_Init+0xa): undefined reference to `ll_ble_events_init' ld.exe: (ll_ble_events_init): Unknown destination type (ARM/Thumb) in stm32wba_ble_stack_full.a(le_ctrl.o) le_ctrl.c:(.text.LECTRL_LL_Init+0xa): dangerous relocation: unsuppor

STM32CubeMX v6.17.0While configuring an STM32CubeMX project for an STM32H753 Ethernet project on a NUCLEO-H753ZI, I observed some strange behavior.After enabling memory management, including the checkboxes- Apply Application Regions Settings to Peripherals and- Apply Application Regions Settings to Linker Files,I would have expected the memory regions to be included in the linker description file STM32H753XX_FLASH.ld.Unfortunately, this was not the case.However, since the STM32H753XX_FLASH.ld file had obviously been regenerated, I did not suspect the file handling itself.After several hours of searching, I discovered that if the .ld file is deleted before regeneration, different content is generated.Steps to reproduce this:Open STM32CubeMXFile / New Project… / Board SelectorSelect NUCLEO-H753ZIIn „Board Project Options“ dialog, click button „Unselect All“Set Project Manager / Project / Toolchain / IDE  to CMakeand Default Compiler/Linker to ST Arm ClangFile / Save ProjectGenerate

Confirming that CubeMX loading problem has been fixed. But I need to point out that RAMCFG enabling still comes with issue: AXISRAM clocks enabling code is not generated. As I wrote in another post, clocks are partially enabled by RIF code: STM32N6 RIF and MMT autoconfiguration errors - STMicroelectronics Community But AXISRAM3 clock is not enabled, so firmware halts. And power needs to be enabled also. My workaround is to enable all the AXISRAM clocks and power in HAL_RAMCFG_MspInit: void HAL_RAMCFG_MspInit(RAMCFG_HandleTypeDef* hramcfg) { /* USER CODE BEGIN RAMCFG_MspInit 0 */ /* USER CODE END RAMCFG_MspInit 0 */ /* Peripheral clock enable */ __HAL_RCC_RAMCFG_CLK_ENABLE(); /* USER CODE BEGIN RAMCFG_MspInit 1 */ /* AXI SRAM1-2 is already enabled by BootROM. * Enable AXI SRAM3-6 clocks manually because CubeMX doesn't do it. */ __HAL_RCC_AXISRAM3_MEM_CLK_ENABLE(); __HAL_RCC_AXISRAM4_MEM_CLK_ENABLE(); __HAL_RCC_AXISRAM5_MEM_CLK_ENABLE(); __HAL_RCC_AXISRAM6_MEM_CLK_ENABL

Hello,I would like to request an enhancement to the search functionality in STM32CubeMX's pinout view.Currently, the search works well for exact or partial matches — for example, typing "usart1_rx" highlights the relevant pins. However, it would be very useful to support wildcard characters, allowing searches such as:- usart?_rx — match RX pins across all USART peripherals (USART1, USART2, etc.)- usart1_?x — match both RX and TX on USART1- *art*_?x — match all RX and TX signals on LPUART, UART, USARTThis would be especially helpful on larger packages with many peripherals, where you want to quickly visualize all pins serving a particular role across multiple instances of the same peripheral.The implementation complexity should be low — this is essentially replacing the existing string match with a simple wildcard pattern matcher against the same search index.Thank you for considering this improvement!

Hi communityI found a missconfiguration in CubeMX while using a MCU TFT with FMC.Description:Device: STM32N6 (STM32N645B0HxQ) / Cortex-M55CubeMX Version: v6.17.0Peripheral: FMC, LCD Interface, 16-bit data width, A16 as RS/DC (Register Select)Symptom: A single WriteCommand() call (one STRH instruction to 0x60000000) produces 3 WR pulses on the oscilloscope instead of 1. The LCD display remains gray despite a correct initialization sequence. All FMC timing parameters and Write FIFO settings were verified and are not the cause.Root Cause: The Cortex-M55 (ARMv8-M) treats 0x60000000 as Normal Memory by default. This allows the CPU to merge and reorder 16-bit write accesses into 64-bit bursts, resulting in multiple spurious WR pulses on the FMC bus. The LCD controller receives garbage data and cannot render anything.Solution: Manually configuring an MPU region for 0x60000000–0x63FFFFFF as Device nGnRnE memory resolves the issue immediately. After applying the MPU config, exactly 1 WR pu

Hello Community,I'm working on a storage module using SDcard for my project. In my application I would like to read and write to the SDcard using the MDMA as indicated in the reference manual of my micro-controller. For now I have the SDcard working in 4-bit mode but using the CPU.I use the STM32H757II on a PCB connected to a SDcard reader on the same PCB.With CubeMX I generated the code that allow me to mount a FATFS on my microcontroller and I can create/open/write/read on file with no problem.But my application needs to log a lot of data to the sdcard periodically, to free-up the CPU I would like to do the transfer using a DMA.In the reference manual 58.5.7 MDMA request generation it is explained that the MDMA can control the SDMMC peripheral to start new transfer"The internal trigger lines from the SDMMC allow passing direct request to MDMA controllerto enable successive transfers from/to different internal RAM addresses without CPU use. [...]The event can trigger the clearance of

Split from this thread. Hi mƎALLEm, Thanks for this reply and confirming that the OSC_OUT can be used as GPIO when HSE in bypass mode. Can  you please advise I do I set this as a GPIO? CubeMX does not allow me to configure this pin. Should this be hand coded to make this possible? Thanks. Regards Billy

Hello, few days ago ST MCU FINDER PC v 6.1.0 stop downloading updates with error message:It's only me, or server problem? Thank you. Regards,Slavomir Tomascik

When using the IOC file in the attachment to generate code with an operating system, MDK-ARM V5.32 is selected. It is found that the directory ..\Middlewares\Third_Party\FreeRTOS\Source\portable\GCC is missing, resulting in compilation failure in Keil.

Why after last update the pins PD7 , PD6 are only with USB_OTG_HS functions: 

When enabling MCE2 for the STM32N6 with the following settings:the generated MX_MCE2_Init crashes here: ContextAESConfig.KeySize and ContextAESConfig.Cipher_Mode are not initialized to any value. After adding:  ContextAESConfig.KeySize = MCE_AES_256;  ContextAESConfig.Cipher_Mode = MCE_CONTEXT_BLOCK_CIPHER;the function crashes to:HAL_MCE_EnableAESContext cannot be called with MCE_NO_CONTEXT.  

Created a STM32H743II prj with I2S2 enabled, half-duplex slave receive mode, and DMA1 S0 bounded to SPI2_RX, to work with an ADC in master mode. Can't get data from the ADC ( DMA linked mem area always zero ), while my oscillograph can properly decode the ADC I2S data output pin ( CK & WS pin also connected between the ADC board and the H743 board, and the oscillograph ). In cube, the SDI pin is mapped to SPI2_MISO, PB14. But as a slave, shouldn't the correct SDI pin map to SPI2_MOSI, PB15? So I modified the cubeMX generated code manually, by changing PB14 to PB15 in the I2S2 GPIO initialization sector, and it worked, the DMA linked mem area shows the same value on my oscillograph. Is this a cubeMX bug?

I am using CUBEMX Version      6.17.0STMCUBE IDE                            2.1.0FW Package name & version     STM32Cube FW_H7 V1.13.0Enabled LWIP ETH With FREERTOS CMSIS2same settings did with cmsis version 1 it's working but with cmsis version2 NOT WorkingI configured on internal Timer TIM1 as soon as I connect Eth Cable program counter not reaching threads & Timer callback / TIM6(systick update).I checked in fault handlers it is not reaching here ETH State in eth handler is (READY STATE --> START STATE)Error code in eth handler is zero.Here I have attached my .ioc fileI have updated flash ld file as per repository code LWIP Debug Messages :