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hi guys  I need to put a F/W program on my board that my coworker made but there’s a problem with CN6 so I have to use TAGand I can’t use USE port for power so I can use only VIN  when I was using the STM32CubeProgrammer then I got this error I changed mode, reset mode and frequency but it couldn’t help Does any body know to solve this problem? please let me know 

Could you please clarify whether the ST67W611M1 supports IEEE 802.11k/v/r and Wi-Fi roaming?If it does, could you please point me to the documentation that describes this support? I could not find any information about it in the datasheet, user manual, or ST Wiki.

Hello ST Support Team,Our customer has requested confirmation that the current FDA901 IB14 LC Filter Setup setting is appropriate, together with a quantitative technical basis for the selected setting. An explanation based only on previous use of the same setting is not sufficient. Therefore, we need supporting data that can be used in our response to the customer.Our application conditions are as follows:Device: FDA901 Output configuration: BTL PWM modulation: Out-of-Phase Output filter topology: Second-order low-pass filter based on the recommended circuit Inductance: 10 µH Capacitance: 4.7 µF Applicable load impedance: 1 Ω, 2 Ω, or 4 Ω, depending on the system configurationPlease refer to the attached schematic excerpt for the detailed circuit configuration and component tolerances.Could you please share measured or design-calculated phase-margin data for each IB14 D[3:1] value from 000 through 111 under the application conditions described above?If phase-margin data for the individ

Hi, Folks.I’m using a board with NUN code ending in $CR1, C260400252, MB...Q-C02 if that includes useful rev info.I started powering this ST Nucleo board with +12 from a bench supply, limited at 600 mA, into CN3 pin 24 with ground on pin 20 (19,20,22 all ground) and that was being regulated down to +5 by U25 just fine.  So I let the board see the +5 by inserting CN9:5-6 jumper.With nothing plugged in but power, LD1 was on (green), LD9 red on and green flashing, LD4 red on faintly, LD5 flashing red.  All this as expected except the state of LD9 which appeared to be due to 3V3_STLK existing (regulated from 5V) but no USB connection.  I checked and recorded all the voltages on CN2; everything looked reasonable except pins 9 and 10 pertaining to the internal SMPS which is free floating, because by default VDD1V8 is not being generated (low nonzero voltage at TP14).I was about to plug the cable I’d made into CN1 when I noticed LD5 had stopped flashing and the current being drawn from my 12V

Dear all,I am using an application on the NUCLEO-F401RE board. I wrote and successfully compiled a program (with no errors), but I am encountering an error during debugging with the message: "Failed to execute MI command: remote target localhost:61234".The ST-LINK (ST-LINK GDB server) is configured as the debug probe and SWD interface.I have replaced the communication cables and reinstalled the STM32CubeIDE software. It used to work normally.The log is attached below:

Hii’m triyng to use USBX audio class on nucleo-h563zi. i have succed to make PC to recognise the board like a controller audio but windows have problem to start the device (error code 10), problem 0xA status:  0xC0440027i’m stuck at this fase unfortunately also i think there are some missing files in the middleware directory, in the example provided by ST UX_Device_Audio2.0_Playback (not sure is related to the error to start device)there is this code: VOID USBD_AUDIO_PlaybackStreamChange(UX_DEVICE_CLASS_AUDIO_STREAM *audio_play_stream, ULONG alternate_setting){ /* USER CODE BEGIN USBD_AUDIO_PlaybackStreamChange */ /* Do nothing if alternate setting is 0 (stream closed). */ if (alternate_setting == 0) { return; } BufferCtl.state = PLAY_BUFFER_OFFSET_UNKNOWN; /* Start reception (stream opened). */ ux_device_class_audio_reception_start(audio_play_stream); /* USER CODE END USBD_AUDIO_PlaybackStreamChange */ return;}the function ux_device_c

Hello,We use two ST67W611M1 modules with STM32H563 hosts (bare-metal, SPI host interface at 10 MHz; reproduced at 20 and 40 MHz as well). Both modules run the NCP/AT build reporting AT version:1.0.0.1 (Mar 20 2026 09:32:19), sdk 2.0.106. One module is a SoftAP with a TCP server, the other is a station that opens one TCP client link to it.We have a reproducible failure on the station module that we would like you to look at, because its timing is too regular to be load-related.Symptom. Exactly 60 s after AT+CIPSTART succeeds (about 62 s after +CW:CONNECTED), the station module stops serving the SPI host: the next AT+CIPSEND=0,<n> never gets its > prompt, the RDY (data-ready) line stays low, and every subsequent AT command goes unanswered. There are no SPI framing errors on our side (header sync and length checks are clean up to the last frame). The Wi-Fi association and the DHCP lease survive — the AP module's AT+CWLIF still lists the station — so it is the SPI/AT service insid

I could not find any literature about this so I decided to post on community. When I activate ISM303DAC I experience noise on other parts of the board. At first, I thought this is caused by the communication, but it is not. Also, there is no noise when only the accelerometer is enabled. My theory, the noise is caused by the set/reset function...I haven’t been able to prove my theory, yet. I am working on it. So, I am asking if anybody experienced the same problem. Thanks for the feedback. Your thoughts and comments are welcome.  

ETH is obviously a dual-clock peripheral, and some of the registers are most probably behind a synchronizer, in the MII clock domain. It’s not unlikely that reading some of those registers imposes waitstates. Writing may not, but then those are subject to the Successive write operations to the same register might not be fully taken into account erratum (which hints at the fact that there’s a 4-MII-clock synchronization mechanism, at least for writing).Can ST confirm or deny, whether reading and/or writing ETH registers imposes waitstates, and in case of yes, can ST please list related registers and also quantify number of waitstates. Here’s why.In particular, we need this to be quantified for the ‘F4xx, but for other families it would be a bonus to have this, too.Thanks,JW

I’ve started a thread before the migration. Now as it received the best answer, I would like to close it by marking that answer, but I can’t as the appropriate item is missing from the posts’ menu.To exclude some potential issue with this incarnation of the forum: can Moderators please confirm that this is consequence of the migration, or is it something else?JW

Hey there,I have made a working implementation of the VL53L9 tof lidar sensor for linux.You can find it here:https://github.com/jonferran/vl53l9cx-pi-lidar Jon

Hello,I am evaluating cryptographic performance for a secure boot using a NUCLEO-H533RE board and the OEMiRoT example from STM32CubeH5.I compared two AES-128-CTR implementations:Software: mbedtls_aes_crypt_ctr(). Hardware-backed: bootutil_aes_ctr_encrypt() using SAES.The mean encryption times are:Input size Software SAES-backed implementation 32 bytes 10.55 µs 29.46 µs 256 bytes 76.70 µs 222.88 µs 1024 bytes 303.50 µs 886.02 µs  For an academic comparison, is it accurate to describe this result as “software AES-CTR versus SAES ECB with software CTR and driver protection overhead”? Thank you!

This is the follow-up to my 2023 thread, which is now closed for replies:https://community.st.com/stm32cubeide-mcus-28/azurertos-netxduo-unable-to-download-16k-or-larger-image-using-web-http-client-secure-124990Short version: the stall is in the ST NetX Ethernet glue driver (`nx_stm32_eth_driver.c`), not in NetX Duo, and not a packet-pool sizing problem. The fix is about 40 lines and still applies to the current `STMicroelectronics/stm32-mw-netxduo` main branch, which has the same driver code. I have filed it with ST as a bug with the full write-up and patch: https://github.com/STMicroelectronics/stm32-mw-netxduo/issues/1 **Symptom (from the original thread)**HTTPS downloads of 16 KB or more via `nx_web_http_client` + NetX Secure stalled on every attempt on F417, F429 and H723. Plain HTTP downloaded multi-MB files fine with the same pool. After a stall the socket stayed ESTABLISHED and the pool showed fewer free packets than expected, which I wrongly reported as "free_packets corrupted

I was playing around with CubeMX2 (Version: 1.1.1) and some examples.I took the current STM32CubeC5 FreeRTOS low-power example (git tag cadccf7), generated the CMake project, compiled it in STM32Cube for VSCode and started debugging it… which worked fine initially.I then wanted to enable the “Debug” options inside “HALE System Init” in CubeMX2.After re-generating the project code and compiling it, it did not run properly anymore.It always became stuck inside “ASSERT_DBG_STATE(htim->global_state, HAL_TIM_STATE_ACTIVE);” in “HAL_TIM_Stop_IT” located in “stm32c5xx_hal_tim.c”.The callstack was like this:mx_freertos_app.c → app_freertos_post_sleep → mx_pwr_exit_low_power → mx_rcc_init → HAL_UpdateCoreClock → HAL_InitTick (in stm32_hal_timebase_tim.c ) → HAL_TIM_Stop_IT My actual questions:Is this just a “bug” in the example? If so, how should the code inside “app_freertos_post_sleep” or around it actually look like? If this is a problem somewhere else - How can I fix it or when will it b

STM32CubeMX 6.18.1 + STM32Cube FW_G4 1.28.3Target: STSPIN32G4 / TIM1Asymmetrical Dead Time enabledCubeMX GUI:Dead Time = 50 Falling Dead Time = 50 Asymmetrical Dead Time = EnableGenerated LL code:C  TIM_BDTRInitStruct.DeadTime = 50;No write to TIM1->DTR2 is generated.Runtime observation:DTAE = 1 DTGF = 0Therefore CubeMX appears to generate DTAE but not DTGF.

Student capstone: VL53L1X vs VL53L5CX for drop-off detection on a wearable aid for blind usersHi ST team,I'm an Electrical Engineering student at BCIT in Vancouver, and my capstone team is building a wearable obstacle detection aid for blind users. A chest-mounted depth camera handles obstacles, and we want dedicated ToF sensors for drop-offs like stairs going down. The sensors would be mounted at chest or waist height, angled down at the floor about 1.5 m ahead of the user, and read over I2C by an ESP32 so drop-off warnings don't depend on the main processor.We're still deciding between 2 to 3 VL53L1X single-point sensors and one VL53L5CX, and would really appreciate a quick recommendation. Our main concerns:- Measuring the floor at a shallow angle from about 2 m away. Which part handles that geometry more reliably, and what would you suggest for field of view or ROI settings?- Dark, glossy, or polished floors (tile, vinyl, gym floors) that may return a weak or specular signal.- Readi

I have been writing some code to recover from the NMI after reading unwritten OTP addresses but I found a bit of a snag when checking that the Address listed in FLASH_ECCDETR is what I would expect after a read.The Table 42 of the H503 reference manual (RM0492 Rev 2) lists a minimum ADDR_ECC offset of 0x0600. I was a little unsure what exactly this meant but `HAL_FLASHEx_GetEccInfo()` clearly runs:// FLASH_ADDRESS_OFFSET_OTP is defined as 0x600 as you would expect herepData->Address = (FLASH_OTP_BASE + ((addr_reg - FLASH_ADDRESS_OFFSET_OTP) * 4U)) & 0xFFFFFFFFU;Seems simple enough then - the number is just which OTP word triggered the error minus 0x600.Except the actual offset I am seeing in the address field is 0x200 instead of 0x600.Reading an unwritten OTP at 0x08FFF010 gives me an ADDR_ECC of 0x204, reading 0x08FFF020 gives me 0x208, and so on...Is this an error in the Reference Manual and HAL? Should the listed value be 0x200 or am I missing something here? Thanks!

HI everyone,I am using STWINBX1 sensor board. i am facing a problem while converting the .DAT file  to CSV file. i have recorded the data on SD car using the ST BLE sensor app. the converted data seems to be corrupted. i have used only one sensor  iis3dwb_acc for data acquistion. is there any easier way for the conversion of the data. i have used the python code which comes with the FP-sns-datalog2-1.2.1 (older version) called hsdatalog_data_export. and  i am using the latest DATALOG2 version 3.4 on the board. as we cant record with older versions.thanks in advance 

IntroductionThe STM32H5 device in SMPS package supports SMPS mode only and does not support LDO mode.For devices in SMPS packages, when operating in bypass mode, the external supply ramp slope must be higher than 3.5 mV/μs. This is mentioned in RM0481 in the “Startup with VCORE provided from an external supply (Bypass)” section. The STM32H5 devices embed a high-power efficiency SMPS step-down converter that needs external components capacitance and inductance. So, how is this inductance characterized?Explanation regarding inductor characterizationFor correct operation of the STM32H5 device, the inductor used in the SMPS circuit must meet the specification defined in the datasheet (for example, DS14258). This requirement is based on design simulations and validated product behavior. Reducing the Isat and/or Irms specifications below 1 is not acceptable.Where:Isat is the DC current at which the inductance drops 30% from the value without current. Irms is the average current for which the

Hello,while investigating a HardFault on an STM32U385RGT6Q, I noticed several differences in the code generated by newer CubeMX versions.At the moment I am unsure whether I have overlooked a configuration dependency or whether this is an actual CubeMX code generation issue.Environment:MCU: STM32U385RGT6QFlash Configuration:    Total Flash : 1 MB    Bank 1      : 512 kB    Bank 2      : 512 kBApplication Memory Layout:    0x08000000 - 0x080FDFFF  Application Flash (1016 kB)    0x080FE000 - 0x080FFFFF  Parameter Storage (8 kB)Protection Settings:    Application Area:    Read Only by Privileged Code Only    Parameter Storage:    Read / Write by any Privileged level In CubeMX Version 6.15.0 Flash and MPU initialisation look like this: static void MX_FLASH_Init(void){ /* USER CODE BEGIN FLASH_Init 0 */ /* USER CODE END FLASH_Init 0 */ FLASH_OBProgramInitTypeDef pOBInit = {0}; FLASH_BBAttributesTypeDef FLASH_BBSecInitStruct = {0}; /* USER CODE BEGIN FLASH_Init 1 */ /* USER CODE END FLA

I’ve recently installed stm32cubemx2-1.1.1-X64-Windows-installer.exe on Windows 22H2, and after reboot found my PATH to be broken. I have confirmed this in a fresh VM.Before the installer, PATH is an “Expandable String” - hex(2) is REG_EXPAND_SZ[HKEY_CURRENT_USER\Environment]"Path"=hex(2):43,00,3a,00,5c,00,55,00,73,00,65,00,72,00,73,00,5c,00,[...]After the installer, PATH is a plain “String” / REG_SZ[HKEY_CURRENT_USER\Environment]"Path"="C:\\Users\\[...]Please resolve this ASAP (checking the uninstaller too), and consider notifying users. Re-creating the key isn’t too onerous, but could be an elusive and risky fix for many.

Hello,We are designing a PCB around the STM32N657B0 (VFBGA198) using the internal SMPS. VDDSMPS and VDDA18PMU are fed from a dedicated 1.8 V buck, with VDDA18PMU filtered from the same rail, as per Figure 2 in DS14791.For our derating and fault analysis we need the absolute maximum ratings of these two pins, and we cannot find them in any current ST document:DS14791 Rev 11 (Sep 2026), Table 22 “Voltage characteristics”: no VDDSMPS or VDDA18PMU row. The “VDDA18 – VSS, 1.98 V” row lists only VDDA18PLL, VDDA18CSI, VDDA18USB and VDDA18ADC. DS14791 Rev 11, Table 25 “General operating conditions”: VDDSMPS and VDDA18PMU are 1.62 / 1.8 / 1.89 V. DS14791 Rev 11, Table 29 “Characteristics of SMPS step-down”: the input is called “VDDA18”, 1.62 to 1.89 V. AN5967 Rev 6, AN6000 Rev 1 and RM0486 Rev 4: no absolute maximum for either pin.QuestionsWhat are the absolute maximum ratings (min and max) for VDDSMPS and VDDA18PMU? Does the “VDDA18 – VSS, 1.98 V” row in Table 22 also cover VDDSMPS and VDDA18P

Hello ST team,I am designing a custom three-phase inverter using the STDRIVE102BP to drive a 24 V, 26 W BLDC motor. I would like to clarify the recommended external connections for VS, VCC, REGIN_3V3, and VDD.I have reviewed the datasheet and the EVLDRIVE102BP schematic, but I am still confused about the power supply configuration. Are separate external 12 V and 3.3 V supplies required? Do I need to supply VS with an external 12 V source and REGIN_3V3 with an external 3.3 V source?Alternatively, if I use an external 3.3 V supply, should REGIN_3V3 and VDD be connected together to bypass the internal 3.3 V LDO? Does this bypass require any SPI configuration, or is it implemented entirely through the external connections? How is the evaluation board powered in its default configuration? In the EVLDRIVE102BP schematic, REGIN_3V3 is connected to VCC through JP4, with pins 1–2 shorted by default.VS appears to receive power from the external supply through the board’s connections. Initially,

For example, if I edit the ‘Synchronous Predivider’ value for the STM32F030 RTC: Then, say, click on TIM1: Then go click back to the RTC view: My edit is gone! I’ve also been caught-out with this on UART baudrate.I suspect it applies to any numeric-entry field. This should, at least, ask if I want to lose edits. On Win11-Pro.

I wish to get a better understanding of how the TNR works. The precision figures given in the DS are with the TNR enabled. What is not clear from this is what impact it has on the frequncy response of the sensor. So, suppose I have a linear actuator moving sinusoidally at 3Hz over a few mm radially to the sensor, will this be picked up cleanly without attentuation with the TNR enabled or would I need to disable it? I can operate the sensor at 30fps up to 100fps for data capture. thanks