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FBL
ST Technical Moderator
August 7, 2026

FAQ: Why USB can take control of shared DP/DM pins on STM32

  • August 7, 2026
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Introduction

On STM32 MCUs, where USB data pins can be shared with GPIO, the USB peripheral can internally take ownership of those pins when the USB transceiver is enabled.  In that case, GPIO writes may not be visible on the external pin.

When the USB transceiver is disabled or put in power-down, the USB function releases the shared pins and GPIO control become visible again.

Note: STM32 USB OTG_HS controller is excluded in this FAQ.

1. Question

Why do GPIO writes on USB DP/DM pins sometimes appear to have no effect on STM32, and how can I restore GPIO control?

2. Answer

On STM32 devices with shared USB DP/DM GPIO, the USB peripheral can control those pins when it is enabled and the transceiver is active.

For example, PA11/PA12 are shared with USB FS DP/DM on STM32 devices.

USB_CNTR.PDWN bit controls whether the USB transceiver is in power down state.

When the transceiver is powered down, the USB block releases the pins.

At that point, GPIO control on the shared pins can become visible again.

If PA11/PA12 is configured as GPIO, the expected signal is not seen at the pin, the first thing to check is whether the USB transceiver is still active.

Note that the USB transceiver is powered down at power-on. This implies that these pins are always initially under GPIO control.  If the pins are to be used for USB in the application, then the transceiver should be enabled at initialization. At no point, in such a case, should it be disabled subsequently. If this “accidental” enable, blocking normal GPIO behavior, is discovered to be the case, then the correct action is to remove the code that enabled the USB transceiver.

3. Technical explanation

This behavior is usually due to pin ownership, not a GPIO defect.

The pin is physically shared between:

  • The GPIO path.
  • The USB transceiver/USB analog block.

When USB is enabled, the USB controller may be connected to the pin.

If USB is active, the pin may not behave like a normal GPIO pin.

If USB is powered down or disabled, the pin can revert to GPIO behavior, which is expected.

Electrically, we cannot control GPIO pins.

4. Practical troubleshooting steps

If DP/DM pins do not behave like GPIO:

  • Check the device family and pin mapping in the datasheet.
  • Check the reference manual for the USB configuration and pin routing.
  • Confirm the GPIO mode and alternate function settings.
  • Verify whether the USB peripheral is enabled.
  • Verify the power-down/enable bit.
    • On USB controller, check USB_CNTR.PDWN
    • On USB OTG controller, check OTG_GCCFG.PWRDWN
  • Observe the pin with a scope or logic analyzer.
  • Test with USB disabled or the transceiver in power down.

5. Series specific notes

Some STM32 devices embed USB controllers and others embed USB OTG controllers. Refer to AN4879 or How to configure the packet memory area in STM32 USB controllers.

5.1 USB device controller

PA11/PA12 are shared with USB FS DP/DM.

USB_CNTR.PDWN controls the USB transceiver power state.

When PDWN puts the transceiver in power-down, the USB block releases the pins.

GPIO control may become visible again on the shared pins.

5.2 USB OTG_FS controller

Compared with USB use cases, the behavior is often easier to misunderstand because OTG implementations may also involve additional role-related signals such as ID and VBUS, which can make the pin ownership story less obvious. In this FAQ, we don’t cover ID and VBUS pins.

The same high-level principle applies when the USB PHY/transceiver is active. It can take control of the shared pins when it is powered down or disabled, the pin can be released

However, register names and bit polarity may differ by controller:

USB OTG_FS and USB FS transceiver are disabled by default.

For example, some series use a PWRDWN type control, while others use a different USB power-down bit.

Always check the reference manual for the exact device.

6. About USB pins in AF tables vs. additional functions

USB pins appear in the Alternate Function tables. On other STM32 datasheets, they are documented as Additional Functions. This reflects family specific pin routing architecture.

  • In some devices, the USB signal path is managed through the GPIO AF mechanism through GPIOx_AFR registers.
  • In others, the USB block connects directly to the analog block when enabled and there is no need to configure USB data lines in software. This applies even if it is configured in the code.

Note: After enabling USB OTG_FS PHY Power down bit, USB data pins can be configured in AF mode, but it is not necessary.

The exact configuration flow is not identical across all STM32 series, refer to the corresponding datasheet.

Takeaway

If a USB DP/DM pin does not respond like a GPIO, first check whether the USB transceiver is still active.

Active USB transceiver → USB owns the shared pins.

USB power-down/disabled → USB releases the pins and GPIO control can return.

This is generally expected hardware behavior on STM32 devices with shared USB/GPIO pins, not a silicon defect.

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