STM32 MPUs Products and hardware related

 Hi~ My board gets stuck at the kernel stage during boot. I've referred to numerous related posts but failed to resolve the issue.The boot file versions I use are OP-TEE 4.0, U-Boot 2023.10 and Linux 6.6.116.The official device tree I referenced is stm32mp157f-ed1.I have attached the boot logs, hardware schematic and device tree files. Please help analyze the root cause of the problem.   stm32f7-i2c i2c@5c002000: pinctrl_select_state_full: pinctrl_config_one: err=-19​    [ 1.741795] arm-scmi firmware:scmi: SCMI Protocol v2.0 'ST:' Firmware version 0x0 [ 1.748959] DEBUG: SCMI CLOCK PROBE STARTED! sdev name: scmi_dev.2 I/TC: SCMI-CLOCK: Reporting 34 clocks to Linux I/TC: SCMI-FW: ETZPC ID 2 DENIED for Non-Secure world! I/TC: SCMI-MSG: NS Request Clock ID 15 (iwdg1), ETZPC 2, Access=FAIL I/TC: SCMI-CLK: ID 15 has no name/not found I/TC: SCMI-FW: ETZPC ID 7 DENIED for Non-Secure world! I/TC: SCMI-MSG: NS Request Clock ID 16 (rng1_k), ETZPC 7, Access=

Hello all,We are bringing up DDR4 memory on a custom STM32MP257D-based SOM. We have made significant progress but are now blocked on a specific PHY training failure that we cannot diagnose without access to the Synopsys PHY firmware streaming message documentation. We would appreciate any help interpreting the failure and identifying the root cause.Board OverviewSoC: STM32MP257DAK3 (VFBGA424)DRAM: 2× Alliance AS4C512M16D4A-62BIN (DDR4-3200, 8 Gbit × 16, 1.2V, VPP 2.5V)Topology: 32-bit bus, 2 GB total, single rank, soldered downPMIC: STPMIC25APQR (I²C7)Reference HSE: 40 MHz crystalTool chain: STM32CubeMX 6.16.1, STM32CubeIDE 2.0.0, STM32DDRFW-UTIL, STM32CubeProgrammer 2.22Bring-up StatusWe are using STM32DDRFW-UTIL with verbose PHY messaging enabled (hdtctrl = 0x05, custom g_waitfwdone.c patched to decode major messages and dump streaming messages).Power Rails (all verified by HW measurement)VDD_DDR: 1.20 V :white_heavy_check_mark:VTT_DDR: 0.60 V :white_heavy_check_mark:VREF_DDR: 0.60 V

Hello,I have been trying for some time now to connect a Raspberry Pi 7" screen to my STM32MP157F development kit, as the screen that comes with it is too small for my purposes. I do not have a large amount of experience with embedded systems or working at the Linux kernel level. I have been referencing the display wiki page, however I have not been able to get the screen to output anything, only for the backlight to turn on. I have been plugging in the 15 pin connector into the 20 pin CN4 port on the board, which is stated to work on the wiki. I have seen this adapter  referenced online, but I would rather not have to order it if not necessary as I am on a time crunch. I have tried many different device tree configurations, in addition to the example given on the wiki. I am at a loss here, and would greatly appreciate any guidance. Below is snippet from my device tree, which I have modified from the wiki.  &dsi { status = "okay"; ports { port@0 { reg = &

 Hi all,I have a board designed around the STM32MP153FAD (TFBGA257, 10×10 mm, 0.5/0.65 mm pitch, 257 balls). Since the MP153 does not include a DSI controller or GPU, I did not connect any DSI-related power pins or signals. Due to stock shortages, I am now considering switching to the STM32MP157FAD, which shares the same TFBGA257 footprint.My question is: can the STM32MP157FAD be used on this board without connecting the DSI-specific power rails?The DSI power pins that exist on the MP157 but were not populated on my design are:VDD_DSI — DSI I/O supplyVDD1V2_DSI_REG — output of internal 1.2 V DSI regulatorVDD1V2_DSI_PHY — 1.2 V supply for DSI PHYVDDA1V8_DSI — 1.8 V analog supply for DSIMy concern is whether the MP157 will operate correctly (for non-DSI use cases) if these pins receive no supply. (Unused pins are floating right now, is that correct or should I connect it to GND)I have attached my current schematic for reference.Any guidance would be appreciated.Best regardsRegards

Hello Support Team,I am trying to start SWD debugging for the STM32MP135DAF7 in STM32CubeIDE using an ST-LINK V2 probe, but I cannot get the debugger to work correctly.My development board is MYD-YF135-256N256D-100-I based on STM32MP135DAF7.I enabled Engineering boot mode (B2 = 1, B1 = 0, B0 = 0)Software versions:STM32CubeMX v6.17.0STM32CubeIDE v2.1.1STM32CubeMP13 Firmware Package V1.2.0Debugger:Original ST-LINK V2Serial number: 30FF6F064E58373521xxxx43Firmware version: V2J47S7I created a simple project in STM32CubeMX and enabled only RCC and SWD debug. Then I opened the project in STM32CubeIDE and configured debugging through OpenOCD with “Connect under reset”.The debugger can detect the target correctly:SWD DPIDR is detectedCPU examination succeedsThe core sometimes halts correctlyBut after that, the debug session fails with many OpenOCD errors such as:timeout waiting for DSCR bit changeError waiting for InstrCompl=1Error waiting for cortex_a_exec_opcodeFail reading CT

I'm working on STM32mp25f-EV1, i have downloaded FLASH-stm32mp2-openstlinux-6.6-yocto-scarthgap-mpu-v26.02.18 package but i'm facing problem while accessing SSH.

Hi,I am working on STM32MP135 with SGTL5000 codec using ALSA/ASoC.Playback is working correctly:aplay -D default /home/audio/test_audio.wavBut audio capture is failing with Input/output error:root@stm32mp135-comtrol:~# arecord -D hw:0,1 -f S16_LE -r 48000 -c 2 test.wav Recording WAVE 'test.wav' : Signed 16 bit Little Endian, Rate 48000 Hz, Stereo arecord: pcm_read:2272: read error: Input/output errorCurrent status:Playback works correctlyCodec detected properlyI2C communication seems OK during playbackCapture stream fails immediately after startroot@stm32mp135-comtrol:~# arecord -l **** List of CAPTURE Hardware Devices **** card 0: STM32SGTL5000 [STM32-SGTL5000], device 1: 4400a024.audio-controller-sgtl5000 sgtl5000-1 [4400a024.audio-controller-sgtl5000 sgtl5000-1] Subdevices: 1/1 Subdevice #0: subdevice #0 Device tree configuration is attached below.Questions:What usually causes pcm_read: Input/output error in ALSA capture?Could this be related to SAI RX configuration?Is there

Hello,I'm working with the STM32MP135F-DK kit and I'm trying to understand the correct way to configure interrupt lines (IRQs) for external devices,  specifically for the STPMIC1 in OP-TEE.I have been reading the official documentation and I'm a bit confused about whether it is mandatory to use the dedicated PWR Wake-up pins (WKUP1–WKUP6) for interrupt lines, or if any GPIO can be used.--- What I observed in the reference DTS files: Looking at the OP-TEE device tree (core/arch/arm/dts/stm32mp135f-dk.dts, tag 4.0.0-stm32mp), I can see that all IRQ consumers use EXTI lines above 55: - STPMIC1 interrupts-extended = <&exti 55 IRQ_TYPE_EDGE_FALLING> (WKUP1 / PF8) --- My questionsIs it mandatory to use one of the 6 dedicated WKUP pins (EXTI 55–60) for any device IRQ managed by OP-TEE? 

Hello,For students, we recently bought the STM32MP257F eval board, and the related camera and hdmi bridge.Everything works perfectly and I would like to connect a Raspberry Camera v2. (IMX219) to the board, as it is also a CSI/MIPI camera (and whe have severals).Can it work ? what should be done related to the software ? (drivers and so on).By the way, what is the process to install packages in the board  ?Best regardsS. M.  

Hi!I have a custom board with 2GB RAM instead of 4GB RAM. Yes, I have configured 2GB in CubeMX and generated the new DT.Check it out here: https://github.com/DanielMartensson/Watermelon-Wine-1A/tree/linux-testing/watermelon-wine-os%2Flayers%2Fmeta-watermelon-wine%2Fmx%2Fwatermelon-wine-1aIt seems that the booting process passes TF-A without any issues. But it fails at the optee boot process.F/TC:0 0 regulator_enable:94 v3v3 F/TC:0 0 regulator_enable:94 v5v_vconn [ 0.000000] SCP-firmware 2.13.0-intree-optee-os-4.0.0-dev [ 0.000000] [ 0.000000] [FWK] Module initialization complete! F/TC:0 0 regulator_set_voltage:202 vddcpu 800000uV F/TC:0 0 lock_i2c_bus_access:796 thread access F/TC:0 0 unlock_i2c_bus_access:837 thread access completed F/TC:0 0 stpmic2_register_read:259 REG[0x20 v=0x1e F/TC:0 0 pmic_get_voltage:192 vddcpu: get voltage: 800000 uV F/TC:0 0 pwr_get_state:243 vddgpu: get state D/TC:0 0 set_opp:60 set volt to 800000uV F/TC:0 0 regulator_set_voltage:202 vddgpu 800000uV F/T

Hi, I'm new to yocto project, I'm trying to bitbake  core-image-minimal image in yocto in stm32mp157d-dk1(scarthgap) ,by editing the bblayers.conf and local.conf in image, its successfully build and flashed into SD card , but I'm trying to boot device then it failed. I found in bootfs sector there was no files in it. I tried to build with kirkstone branch and it worked well, and then I tried to bitbake with scarthgap again and again. I used Ubuntu 24.04 and Linux mint 22.03, but scarthgap branch had the same problems.I wanna know the reason. BIG THX.

I'm using the mp215 with ddr3l (x16) and an ISSI dram ic that is 8Gb (1 gigabyte) which means it's a dual rank configuration compared to a more typical half gigabyte. As far as im aware all 1GB ddr3 dram ic's are dual rank.In AN5723 6.1 Note it says "8 Gbit DDR3 defined by JEDEC is uncommon. Practically, DDR3L density is limited to 4 Gbits (max = 1 Gbyte in total). Single rank only is required. ".an5723 link As far as I understand it it says it's not possible. However this is an older AN and i think it's for the mp25 series only (im using the mp21).However in the ST Wiki "How to setup the DDR configuration" section 5 the exact opposite is implied. This whole section repeatedly describes a "concrete example" of swapping the swapping the mp215-dk's lpddr4 out with a 1GB ddr3 ic. Also using a theoretical dtsi called "stm32mp21-ddr3-1x8Gbits-1x16bits-800MHz.dtsi" and define "DDR_MEM_SIZE 0x40000000" which is 1GB. So this is conflicting info because i dont see how 1gb ddr3 is poss

Hi,I'm using brand-new, unmodified st32mp257f-dk dev board.When using starter package (https://www.st.com/en/embedded-software/stm32mp2starter.html#get-software) flashed onto sdcard according to https://wiki.st.com/stm32mpu/wiki/How_to_populate_the_SD_card_with_dd_command, system boots-up fine, see 'downloaded_no_panic.log'. Version is openstlinux-6.6-yocto-scarthgap-mpu-v25.06.11.When using image built on my own - distribution package  (openstlinux-6.6-yocto-scarthgap-mpu-v25.06.11)  according to https://wiki.st.com/stm32mpu/wiki/STM32MPU_Distribution_Package, using docker, I get following:[ 8.296788] usb 1-1: new high-speed USB device number 2 using ehci-platform [ OK ] Found device /dev/hwrng. [ OK ] Found device /dev/tee0. [ 9.041963] hub 1-1:1.0: USB hub found E/TC:0 0 Panic at /usr/src/debug/optee-os-stm32mp/4.0.0-stm32mp-r2/core/drivers/clk/clk-stm32mp25.c:2000 <clk_stm32_pll_init> [ 9.142742] hub 1-1:1.0: 2 ports detected E/TC:0 0 TEE load ad

Hi, Just now I have done bringing up a custom board for STM32MP133/ STM32MP135 with OpenST Linux, with kernel 6.2:- The whole boot chain bring up from tf-a, uboot, kernel.- Configure PMIC and support DDR test.- Support FMC NAND, change flash partition layout.- A/B FOTA ready Yocto build (with uboot)- Total boot time is 30 seconds to access to ADB (android platform tool)- Platform CAN bringup- Integrate Quectel modem for network over LTEIf someone needs something related to this, I can help.Best,Eric 

Hi,this one is similar to https://community.st.com/t5/stm32-mcus-products/ioselect-option-in-stm32h563-is-not-working/m-p/681099but not the same. While testing OSPI1 on our MP257 board and our FSBL I found thatMSEL in OCTOSPI1->CR is ignored.CSSEL and DMM are honored and works as expected but when DMM=0 then output signalsare the same on both IO[3:0] and IO[7:4].Attached is analyzer output of CLK,CS,IO0,IO4 for transaction with relevant regs:0x50430000: 00000f010x50430100: 04002101AR was 0xfa0000 and 8 bytes was sent to DR.Martin

Can the clkout clock on the PHY chip be disabled, and how is it configured?

Is there a Global Exclusive Monitor connected to the M33 and the A35 cores?Any documentation for it?Thank you

We have some devices based on STM32MP257 SoCs that connect to a 100 Mbit Ethernet network via ETH1, where ETH1 is going straight to an RMII PHY. Pins for ETH2 are reserved, but are not used/not connected. Some of our devices work rock-solid as excepted, but others exhibit massive performance problems on the Ethernet connection.After lots of research, we think that our devices are affected by a silicon bug described in errata sheet ES ES0598 as "ETH1 RMII mode could have CRC errors". Our chip revisions are all rev Y, which are affected by the issue. The errata says that ETH1 should be routed through ETHSW to work around the silicon bug. To test if the workaround works for our case, I've tried to enable ETHSW, but failed so far because STM32CubeMX forces me to free some pins before it allows me to enable ETHSW in RMII mode. It seems like ETH1 and ETH3 must be used together if ETHSW is enabled, the pins for ETH3, however, are already used for other hardware functions.So, my goal is to- en

There is official errata named "2.5.6 Indirect write mode limited to 256 Mbytes" where indirect OSPI write requests for addr >256MB are written to invalid target address. I tested the behavior and it seems address is effectively truncated to 28bits. Contrary to what errata says, I can see the same truncated address also for indirect reads.From what I see the problem is affecting NORs only because NAND uses page addressing in 0x13/0x10 cmds and these are always smaller than 24bits.Is the assumption correct ?Martin

Product:MCU/SoC: STM32MP2Description:In our ST Linux environment, the hantro-vpu driver registers:/dev/video5 -> VDEC (H.264/VP8 Decoder)/dev/video6 -> VENC (H.264/VP8 Encoder) We want to implement direct V4L2 API usage for H.264/VP8 encoding and decoding, without using GStreamer.Specific Questions: Are there official minimal examples or demos using pure V4L2 API for H.264 / VP8 encoding/decoding?DMA Usage: Is it possible to use DMA for input/output buffers in V4L2 mem2mem mode on STM32MP2 Hantro VPU? If yes, what is the recommended configuration and constraints? 

Hi,I have a  OTP provisioning script that wrote OTP 1 with value 0x000000ff, executing a partial close of security state B. The board now passes ROM/FSBL/OP-TEE/U-Boot but resets when the Linux kernel probes the first RIF-protected peripheral (HPDMA3). Disabling HPDMA3 in DT causes the same reset on HPDMA2, indicating closed-state RIF policy is being enforced globally regardless of the device tree configuration applied by OP-TEECan the board be returned to a open state using an rma procedure? Kind Regards,Jack Redpath  

I am trying to collect images from a MIPI camera that is not supported by default on the STM32MP257F-DK, but for which I have a driver. With that driver, it's seeing the camera as an attached device, and I can see it in the dmesg output and also as /dev/media2 in v4l2-ctl --list-devices. I have followed the steps at this link (modified to use the imx664 instead of imx335), and also steps I have found elsewhere (below). Is there anything I need to look for or change in order to actually see image frames from the camera, now that I can see the camera itself?media-ctl -d /dev/media2 -rmedia-ctl -d /dev/media2 -l "'48020000.csi':1 -> 'dcmipp_input':0 [1]"media-ctl -d /dev/media2 -l "'dcmipp_input':2 -> 'dcmipp_main_isp':0 [1]"media-ctl -d /dev/media2 -V "'imx664 0-0010':0 [fmt:SRGGB12_1X12/2704x1540]"media-ctl -d /dev/media2 -V "'48020000.csi':1 [fmt:SRGGB12_1X12/2704x1540]"media-ctl -d /dev/media2 -V "'dcmipp_input':2 [fmt:SRGGB12_1X12/2704x1540]"media-ctl -d /dev/media2 -

The STM32MP135 is powered by PMIC1A. After initial power-up, the voltage at BUCK4 is normal at 3.3V, but during U-Boot flashing, the output voltage at VOUT4 drops to only 2.4V, causing the flashing to fail. The VDD and VDDQ pins of the eMMC are powered by the same power rail, VOUT4.

Hi, I tried exporting the IBIS model from ST website. On importing model to SI tool I can see that there is no model assigned to DSI lines. It is showing NC. Can you share the IBIS model with MIPI drivers in it. or share some IBIS model which I can use for my simulation of MIPI line interface  

 Hi everyone,I am working on an STM32MP2 platform and facing a persistent issue with LPUART1 in interrupt mode.SetupMCU: STM32MP2UART used: LPUART1 (RS485 communication via MAX485)Debug UART: UART5 (polling mode, printf works fine)Using:HAL_UARTEx_ReceiveToIdle_IT() for RXHAL_UART_Transmit() for TXBaudrate: 115200ProblemWhen using interrupt mode, the system gets stuck in: HAL_UART_IRQHandler()The interrupt keeps triggering continuously and the system appears stuck (infinite IRQ loop).ObservationsPolling mode (HAL_UART_Receive) works perfectlySensor communication works fine in pollingIssue only happens in interrupt modeWhat I already checked NVIC enabled correctly:HAL_NVIC_SetPriority(LPUART1_IRQn, 5, 0);HAL_NVIC_EnableIRQ(LPUART1_IRQn); IRQ handler is correct:void LPUART1_IRQHandler(void){HAL_UART_IRQHandler(&hlpuart1);}No wrong handle (huart1) is used anywhereFIFO configuration added:HAL_UARTEx_SetTxFifoThreshold(&hlpuart1, UART_TXFIFO_THRESHOLD_1_8);HAL_UA