Automotive MCUs

Dear ST AutoDevKit Support Team,I am working with the ST AutoDevKit BMS setup and would like to request your technical guidance before powering the system again, because I want to avoid damaging the AEK-POW-BMS63EN board, the L9963E IC, the AEK-POW-BMSHOLD holder, or the cell sense wiring.My hardware setup is:AEK-POW-BMS63EN BMS node boardAEK-POW-BMSHOLD 14-cell holderSPC58EC / AutoDevKit environmentLG INR18650 MJ1 cellsRigol DP711 bench power supply used in CC/CV mode for charging, supports up to 30 volts (7 cells constrains)Rigol DL3021 electronic load for discharge testsI would like to operate the system with 7 cells only, using the following physical configuration in the 14-cell holder:First 5 cell positions populatedMiddle positions unusedLast 2 cell positions populatedThe intended logical L9963E cell mapping would be:Active cells:CELL0–CELL1CELL1–CELL2CELL2–CELL3CELL3–CELL4CELL4–CELL5CELL12–CELL13CELL13–CELL14Unused/dummy channels:CELL5–CELL6CELL6–CELL7CELL7–CELL8CELL8–CELL9CELL9

Dear Sir/Madam,I hope this email finds you well.I am currently working on the development and integration of the ECU project using the SPC5Studio environment and the Wind River Diab Compiler (v5.9.4). During the build configuration and linker script optimization for the SPC56 platform, we have identified a need for specific integration assets.Could you please provide the following files to assist us in completing our toolchain setup:SPC560Dxx_RLA PIT WINDRIVER.zip: Required for the PIT (Periodic Interrupt Timer) driver configuration and OS abstraction alignment with the Diab compiler. 56xx_flash.dld: The specific Linker Definition File (LDF) optimized for the Wind River Diab toolchain to ensure correct memory mapping and flash sectoring.These files are critical for resolving current build-time linker errors and ensuring compatibility between the RLA (Runtime Lightweight Abstraction) components and our compiler version.Thank you in advance for your assistance. I look forward to your pro

We are trying to get raw Ethernet (LAN) running on our SPC572 without using FreeRTOSIs there any code samples that we can use / low level drivers? All help is very much apreciated.Best Regards,  Lars

Hello,We are currently evaluating the EEPROM Emulation package provided for SPC58 devices and would like to understand the intended production usage regarding flash erase operations during block swap.While reviewing the EEPROM emulation source code, we observed the following call flow:eeprom_write()    └─ eeprom_blockswap()           └─ eeprom_lld_flasherase()Inside eeprom_lld_flasherase() we found the following implementation:/* Erase the block */returnvalue = FlashErase(&ssdConfig,                         C55_ERASE_MAIN,                         lowBlockSelect,                         midBlockSelect,                         highBlockSelect,                         nLargeBlockSelect);if (C55_OK != returnvalue) {    return FLASH_ERROR_ERASE;}/* Wait for completion */while (C55_INPROGRESS ==       FlashCheckStatus(&ssdConfig,                        C55_MODE_OP_ERASE,                        &result,                        &dummyCtxData)){}if (C55_OK != result) {    return

Even though in the documentation there is an explicit paragraph declaring that “Exclusive monitor” are present (I cannot copy here, the documentation states that I’m not allowed), but my test seems to prove otherwise.If I try to use ldrex/strex on a variable i SRAM (MPU RASR configured for Shareable, Non-Cacheable, Non-Buffereable) I get a BusError, if I remove the Shareable bit the the exclusive mechanism do not work.Could someone confirm my analysis?Regards

Dear community, I have reviewed the following sections in the reference manual:86.5.1 Censorship86.5.2 Debug Interface AccessThese sections describe the mechanisms for disabling the debug port.After organizing and analyzing the relevant content, my current understanding is as follows: We first generate a hex file to configure the device lifecycle to the In-Field stage. In this state, the debug port will be disabled when the Lock3[DBL] bit is in the locked state.However, I have noticed the following warning in the documentation. Could you please provide the standard operating procedures (SOPs) for both enabling and disabling the debug port?It would be greatly appreciated if reference code or timing diagrams could be attached. Thank you in advance for your support.Best regards

Hello!I am studying the SPC58NH92E7. My chose of MCU is driven by the need to have two Fast Ethernet transceivers operating simultaneously.I'm looking for baremetal (no OS) example for 100BASE-TX. Has anyone come across examples like this? I couldn't one among the standard examples in SPC5Studio without FreeRTOS.The standard approach in SPC5Studio is to use FreeRTOS. I have tried with FreeRTOS + RMII PHY. It's work correctly. Next step - baremetal application with ethernet promiscuous mode. I need to receive simple IPv4 UDP packets.And another question. Where can I find documentation for components/spc5_network_components_rla? "Generate SPC5 Application" doesn't generate any documentation for this. No "doc" folder inside "spc5_network_components_rla".

Hello!I am studying the SPC58NH92E7.I'd like to clarify some terms and definitions. Below, I’ll explain how I understand these terms. Please correct me if I’m wrong.Project examples in SPC5Studio are divided into two classes: "RLA" and "cut2_RLA".RLA here is Register Level Access, correct?What does it mean "cut2"? Lock-step core (vs "cut1" regular core)?Some of the examples are for FreeRTOS, and some are for OSLess. Does "OSLess" here mean that the example doesn't use an operating system? After all, "OSLess" isn't the name of a specific operating system, is it?

For SPC582B, which development IDE is recommeded for code debug and run? Does PLS JTAG debugger software ok to run some demo when using SPC582B-DIS discovery board?

Are HAL drivers and/or LL driver available for SR5E1E3 or E1E5?Where can be found?I saw some HAL LL drivers fin the MCTK SR5E1x Motor Control Toolkit 1.3.0 folder in Stellar Studio (\StellarStudio-9.0\contrib\SR5E1_MCTK-1.3.0\) but they are not present for all peripherals.Drivers present in SDK are not HAL style and seems not complete Thanks

Hi,  I am creating project in STM32 StellarStudio for SR5E1. But the Makefile might be running using ARM GCC. How can I make the project compile using GHS compiler?

Dear Sir/Madam,We are currently working on the SPC560B50 MCU and would like to know the recommended development environment and debugging tools for this device.Could you please suggest:Recommended IDE for project development and codingRecommended compiler/toolchainRecommended debugger software for source-level debuggingRecommended hardware debugger/probe for SPC560B50Currently, we are using SPC5 Studio along with PEmicro Multilink. However, we are facing issues with flashing and debugging the target.Please share the recommended development workflow and tools for flashing, coding, and debugging the SPC560B50 MCU.Best regards,Pandiyan T

Dear Team,We are planning to use the SPC560B50L1B4E0X MCU for project.We would like to get official clarification regarding the development ecosystem and debugging support for this MCU.Could you please confirm the following:Whether FreeRTOS is officially supported for SPC560B50L1B4E0X.Which debugger is officially recommended for this MCU.Whether PE Micro supports full debugging for SPC560B50L1B4E0X.Whether SEGGER J-Link supports only flashing or full debugging as well.Which IDE/toolchain version is recommended for development.Your guidance will help us finalize the development setup for the project.Best regards,Pandiyan T

My code is as follows. volatile uint8_t d_deadcode = 0U; void sleepManagement(void) { if ((isIgnActive(IGN_1, getGpioInput(GPIO_IN_IGN_1))) || (isIgnActive(IGN_2, getGpioInput(GPIO_IN_IGN_2)))) { return; /* ign sig exist */ } if (isSleepSync()) { sleepEntryHandler(); d_deadcode = 1U; } else { updateDateOld(); requestSleepSync(); } } static void sleepEntryHandler(void) { uint32_t rtcWakeup; irqIsrDisable(); deinitApp(); if (ignOff1hrElapsed.state == OFF) { rtcWakeup = TIME_IGN_OFF_LOAD_60MIN - ignOff1hrElapsed.onTimer; startRtc(rtcWakeup); } startWkpu(); enterStandby0(); } void enterStandby0(void) { /* * PD0(8KB): always retained, not programmable * PD1(32KB): always lost in STANDBY0, not programmable * PD2(56KB): retain in STANDBY0 */ MC_PCU.PCONF2.B.STBY0 = ON; if (SPCSetRunMode(SPC5_RUNMODE_STANDBY0) == CLOCK_FAILED) { SPC5_CLOCK_FAILURE_HOOK(); } }​I expected that when the device enters sleep mode and is woken up by the WKPU, a res

Dear ST Community,I recently bought the SPC582B-DIS board in order to test the EV-VNF1248F board. I installed the VNF1248 Evaluation board GUI and the UDE STK 2021 by following VNF user guide.I downloaded the Chorus1M_VNF1248_discovery.elf in order to test the board, I flashed it with this elf file (flash success) but communication is not possible in the GUI with the good COM port  and good serial configuration (error "Cannot found Demo Board! Check USB cable"  in USB FTDI, and no Rx trame in Serial Port)I tried with another computer, same results. I looked in the forum, I have the good PLS driver (Driver USB PLS\JtagUsbDriver), and I installed the stsw-link009, but still not working.I also found another elf file on st community website --> Chorus1M_M09SpiDriver.elf, and with this .elf, I'm able to communicate, I get Rx trame and uC is active, but I get the error "firmware is not fitting with HW type", which seems logical.If I'm not wrong, I (and anothe

I am developing an spc582bxx microcontroller using AutoDevKit Studio.The device needs to wake up from sleep (standby 0) via wkpu, and RAM data must be preserved when not in por mode.Therefore, I set the MC_PCU.PCONF2.B.STBY0 register before entering sleep.However, looking at the generated boot code, it appears to clear all RAM areas during booting.Is there a boot code sample that preserves RAM data during wake-up via wkpu?I look forward to your reply.Thank you.

I am using sr6p3e and I tried to access Gicr registers but I got aport exception, I tried several things like check if clock control the module and if there is a protection registers but I didn't find anything, I know that it use axim for interface so I tried to write on another module GTM registers after making necessary configuration but I got sameh issue I check the startup code coming with mcal and found it configure mpu for Gicr and prephiral section and when I apply it in my code it solve the issueI don't need to use mpu, is there another way to access Gicr and gtm ?

I am developing using AutoDevKit and SPC582Bxx.When the device wakes up from STANDBY0 to WKPU, it jumps to IVOR0.This occurs when the Trace32 debugger is connected during wake-up.I would appreciate your advice on if there are any specific settings I need to configure in advance.Is this related to the startup code (boot.s, crt0.s)?

Hi Team,   I am facing to connect with SR5E1-EVBE7000P board. I give below the issue. Can anyone help me to resolve this issue   Error in final launch sequence:   Failed to execute MI command: -exec-run Error message from debugger back end: Don't know how to run. Try "help target". Failed to execute MI command: -exec-run Error message from debugger back end: Don't know how to run. Try "help target". Don't know how to run. Try "help target".

Hello, I updated my StellarStudio from 9.0.0 to 9.0.2 and pin configuration editor stopped working showing just only white page. Reverting version back to 9 is working fine again. Tested MCU is SR5E1E5. Thanks!    

Hi Do any example bootloader files exist for the SR5E1E5 micro series.  I can see that there are flash examples in the ESDK area of the StellarStudio, but I cannot find any bootloader example files. If there is no example code, then are there any application notes on the process for creating a bootloader that can program the Flash? Many thanks in advance.  

1. Where can I find pin function list for SPC582B60E1CD00X MCU. Package: eTQFP64  2. Suggestion on tool used to configure pins according to application and generate code.

Hi Apologies in advance if these are daft questions, however I'm trying to put together a development kit for the SR5E1E5 . I have found the SR5E1-EVBE5000P evaluation board, but need a debugger to use with it.  I assume that the ST-LINK/V2 is compatible but can someone please confirm this?  Also can the Stellar Studio All in One be used with this combination? The SR5E1-EVBE5000P has a USB connector can I assume this does not support debugging via Stellar Studio All in One?We already have the SPC5-UDESTK, but I assume that this is not compatible with the Stelar series of micros? Thanks in advance.