STM32 MCUs Embedded software

Hi ST expertSTM32G473cbt6 and STM32G474cbt6 are pin-to-pin compatible, can their software projects be designed into one project?

/* USER CODE BEGIN Header *//**  ******************************************************************************  * @file           : main.c  * @brief          : Main program body  ******************************************************************************  * @attention  *  * <h2><center>© Copyright (c) 2022 STMicroelectronics.  * All rights reserved.</center></h2>  *  * This software component is licensed by ST under BSD 3-Clause license,  * the "License"; You may not use this file except in compliance with the  * License. You may obtain a copy of the License at:  *                        opensource.org/licenses/BSD-3-Clause  *  ******************************************************************************  *//* USER CODE END Header *//* Includes ------------------------------------------------------------------*/#include "main.h"#include "seven_seg.h"#include "timer.h"#include "74HC595.h"#include "led.h"#include "welding_mode.h"#include "adc.h"#include "led_

BOARD: STM32H743IITXACTICLE FOLLOWED: https://community.st.com/t5/stm32-mcus/how-to-implement-a-usb-device-composite-in-stm32h5/ta-p/708078Hello everyone,I was trying to use USB CDC+MSC in composite mode. After following the article mentioned above, i was able to build the project. But after running i was able to only get MSC (as shown in pc) and getting the CDC port with windows error 10.Few things i have changed, in usbd_desc.c updated these lines   0xEF, /* bDeviceClass */ 0x02, /* bDeviceSubClass */ 0x01, /* bDeviceProtocol */ Also i have updated CDC_IN_EP, CDC_OUT_EP, CDC_CMD_EP so it should not match MSC_EPIN_ADDR and MSC_EPOUT_ADDR     #ifndef CDC_IN_EP #define CDC_IN_EP 0x82U /* EP1 for data IN */ #endif /* CDC_IN_EP */ #ifndef CDC_OUT_EP #define CDC_OUT_EP 0x02U /* EP1 for data OUT */ #endif /* CDC_OUT_EP */ #ifndef CDC_CMD_EP #define CDC_CMD_EP 0x83U /* EP2 for CDC commands */ #endif /* CDC_CMD_EP */ #ifndef MSC_EPIN_ADDR #define MSC_EP

HelloI have my own board with STM32G071KBT6 microcontroller. I successfully comunicate with charger by PD protocol and I receive up to 21 V (PPS). But I need above 21V. I have power bank with AVS up to 28V and USB cable with e-marker (up to 240W). How to configure the stack to receive EPR parameters? I have no TCPP IC, but I use my own protection circuit. In the trace the EPR commands isn't present. I use STM32CubeIDE 2.1.1 and STM32CubeMX 6.17.0.Thanks a lot and best regards

Hello,I noticed that in the STM32Cube_FW_H7_V1.13.0 distribution, the folder \Drivers\CMSIS\DSP\Lib has disappeared.Is there a document available that explains how to compile these libraries, and what are the options and defines to set for an STM32H743?Thank you.

Post edited by ST moderator to follow the community rule to post a code snippet: How to write your question to maximize your chances to find a solutionI need to use scan sequence of 3 ADC channel  and DMA transfer of the 3 ADC value .The 3 channel are:sConfig.Channel = ADC_CHANNEL_TEMPSENSOR;sConfig.Rank = ADC_REGULAR_RANK_1;sConfig.Channel = ADC_CHANNEL_VREFINT;sConfig.Rank = ADC_REGULAR_RANK_2;sConfig.Channel = ADC_CHANNEL_15;sConfig.Rank = ADC_REGULAR_RANK_3; but doing this the HAL_ADC_ConvCpltCallback is called only once. if I change the ADC_CHANNEL_15 with   ADC_CHANNEL_VREFINT  everything is working correct. Why ? 

I am using STM32H753ZI and trying to bring up Ethernet (LAN8742, RMII) using HAL + lwIP in NO-RTOS  mode. I generated the code using STM32CubeMX with ETH enabled (RMII) and lwIP enabled (WITH_RTOS disabled, static IP). The PHY link comes up and RJ45 LEDs blink, but the board does not respond to ping and no ARP entry is created on the PC (Destination Host Unreachable). I have placed ETH descriptors and RX buffers in D2 SRAM, enabled MPU and D-Cache, verified RMII_REF_CLK to PA1, selected the LAN8742 PHY driver, and I am calling MX_ETH_Init(), MX_LWIP_Init(), and processing lwIP in the main loop. The FreeRTOS-based STM32H743 Ethernet example works, but I specifically want a HAL-only .

Embedded veteran here, been involved in all manner of MCUs and MPUs professionally (especially safety-critical) but for personal use most of my prior experience has been with PIC16F and 18F (to save money obviously), of course those are only 8-bitters. I’m very interested in learning STM32 MCUs (gee they look ALMOST like DSPs except it’s single-cycle multiply not MAC and no simultaneous pointer adjustments etc.). Thing is my PIC experience has given me a pretty decent collection of chip initialization routines that I can adapt as necessary for small differences with peripheral features and such. My “inherent bias” is bare metal, no FreeRTOS, I understand I may be “going against the grain” a little but I want to get my hands on every nanosecond I may have coming. I don’t necessarily need this in C language, but I would like to get my hands on at least a very detailed list of all the HW registers that COULD need to be set, and the EXACT order in which this is “most safely accomplished”.

STM32N6: Black screen after HAL_NVIC_SystemReset() — FSBL not booting, works fine after NRST/power cycleGövde:Hello,I have a bootloader (FSBL) and a separate application on anSTM32N645L0, running from external XSPI NOR flash MX25UM25645GXDI00 in memory-mapped XIP mode (Octal DTR).Setup:FSBL configures the external flash into Octal DTR mode (volatile CR) at every boot and shows update/bootloader graphics on the display The application runs its own graphics To enter bootloader mode from the application, call HAL_NVIC_SystemReset()Problem:After HAL_NVIC_SystemReset(), the device stays on a black screen — the FSBL graphics never appear. However, if I reset via the NRST button or a full power cycle, everything boots normally.What I suspect:Since the N6 is flashless, BootROM must read the FSBL from external flash in standard SPI mode. My theory is that after a software reset the flash chip stays in Octal DTR mode (it doesn't lose power), so BootROM cannot read the FSBL at all.Questions:Is th

After I configure EP1 to the double‑buffered mode, debugging reveals an issue inside stm32g4xx_hal_pcd.c. At line 1761, the endpoint register value is read. After executing PCD_CLEAR_TX_EP_CTR(hpcd->Instance, epindex); to clear the interrupt flag, the actual register content has already been updated. However at line‑1906, (void)HAL_PCD_EP_DB_Transmit(hpcd, ep, wEPVal); still receives the register value captured before interrupt‑flag clearing. This triggers incorrect conditional judgements inside the HAL_PCD_EP_DB_Transmit() function.Probable root‑cause: When transmitting data for the first time under double‑buffered setup, USB_EPStartXfer populates both buffers by default. After Buffer‑0 finishes transmission and triggers an interrupt, the program reads register data at line‑1761 of stm32g4xx_hal_pcd.c. Right after this read operation, Buffer‑1 also completes its transmission and updates the endpoint register. Since HAL_PCD_EP_DB_Transmit uses the stale register value obtained earli

The code I’ve written in main.c for a program on NUCLEO H7S3L8 works perfectly fine, but on NUCLEO F767ZI goes into hardfault mode when reaching line 455 “mfcc_compute(mfcc_left, audio_buffer_16bit_left, mfcc_feature_left);” (more precisely, inside this function, at line 263 “float last = (float)audio_data[0] / (1 << 15);”). Can someone tell me how to solve the problem? I’ve declared arrays static to not go into stack overflow. Can someone tell me how to solve the problem? (Int_mic_F7 is the project for NUCLEO F767ZI while audio.zip is the project for NUCLEO H7S3L8) 

i have a problem regarding the usage of the jpeg codec on a stm32n657x0h-q to decode images. the project also involves the transfer of such images over eth0 but for the sake of isolation of the problem i have bypassed mongoose. the problem seems to relate only to jpeg interrupts since the hpdma channel0, used to feed the periperal, is working.To develop this project i followed this example for the discovery kit.doing some debugging, i noticed that confr0 is being manipulated (i used a watchpoint), both jpeg_cr and jpeg_sr are being set, but confr1 has a strange behaviour: during Init_process, its registers are properly set, then, when manually halting execution in the cycle in main, the confr1 is set to all zeros. During initialization, registers are as follows:Confr1 has DE and HDR set to 0x1, the others to 0x0;cr has JCEN, EOCIE and HPDIE set to 0x1, the others to 0x0sr has IFTF, IFNFF and COF set to 0x1, the Others to 0x0COF in jpg_cr remains 0x1, as does the JCEN, thus the pheriper

In stm32f0xx_hal.c:/** * @brief Initialize the MSP. * @retval None */__weak void HAL_MspInit(void){ /* NOTE : This function should not be modified, when the callback is needed, the HAL_MspInit could be implemented in the user file */} But this must not be implemented in a User file, because there is already an implementation generated by CubeMX in stm32f0xx_hal_msp.c:/** * Initializes the Global MSP. */void HAL_MspInit(void){ /* USER CODE BEGIN MspInit 0 */ /* USER CODE END MspInit 0 */ __HAL_RCC_SYSCFG_CLK_ENABLE(); __HAL_RCC_PWR_CLK_ENABLE(); /* System interrupt init*/ /* USER CODE BEGIN MspInit 1 */ /* USER CODE END MspInit 1 */} So implementing a HAL_MspInit() in a User file - as the comment in stm32f0xx_hal.c suggests - will cause a “multiple definition” Linker error!

Hi all,I'm working on the STM32H747I-DISCO (CM7 core, bare-metal LwIP without RTOS, polling mode via MX_LWIP_Process()). Goal is simply to get the board to respond to ping from my PC over Ethernet.Hardware done:Solder bridge rework completed per UM2411 Table 5: SB8 closed / SB21 open (PC1 → ETH_MDC instead of mic DOUT), R87 open / SB17 closed (PE2 → ETH_nINT instead of mic CLK)Software config:ETH set to RMII mode in CubeMX, all 9 RMII pins showing green in Pinout view (PA1, PA2, PA7, PC1, PC4, PC5, PG11, PG12, PG13) LWIP middleware enabled, static IP configured (matching my PC's subnet), no DHCP USART3 used for debug output via Putty Everything runs on CM7 only; CM4 isn't touching ETH/LWIPSymptom:The code intermittently jumps into HardFault_Handler(void) — not on every run, which points to a timing/cache-related issue rather than a hard config error. When it doesn't crash, ping still doesn't get a reply./* Private user code ---------------------------------------------------------*//*

Hi everyone, I have developed a custom pcb board and I want to use the usb and a uSD card. I am not really familiar with pcb designing. My guidance was some youtube videos in general, like the Phil’s Lab for the USB + SD MSC (The link, so there is some understanding on the code I have added to the usb app). The USB works. The SD only worked once somehow, while I was stepping the code in the debugging process. I could not do it again. I have tried every possible configuration. The only thing I get is the following from the terminal: [28067.786253] usb 3-4: new full-speed USB device number 86 using xhci_hcd[28067.913272] usb 3-4: New USB device found, idVendor=0483, idProduct=572a, bcdDevice= 2.00[28067.913281] usb 3-4: New USB device strings: Mfr=1, Product=2, SerialNumber=3[28067.913283] usb 3-4: Product: STM32 Mass Storage[28067.913286] usb 3-4: Manufacturer: STMicroelectronics[28067.913288] usb 3-4: SerialNumber: 395834673434[28067.916167] usb-storage 3-4:1.0: USB Mass Storage device

I'm working with an STM32F070 and trying to verify the Independent Watchdog (IWDG). My expectation is that if the watchdog is not refreshed, the MCU should perform a system reset after the timeout expires.The IWDG is configured as follows:MCU: STM32F070 Clock: HSI = ON (System Clock) LSI = ON (for IWDG) IWDG configuration: Prescaler = 256 Reload = 4095 Window = 4095 The watchdog is initialized using HAL_IWDG_Init().To force a timeout, I intentionally do not refresh the watchdog: // IWDG_KICK();while (1){ HAL_GPIO_WritePin(GPIOA, GPIO_PIN_0, GPIO_PIN_RESET); HAL_GPIO_WritePin(GPIOA, GPIO_PIN_1, GPIO_PIN_RESET); HAL_GPIO_WritePin(GPIOA, GPIO_PIN_2, GPIO_PIN_RESET); HAL_GPIO_WritePin(GPIOA, GPIO_PIN_3, GPIO_PIN_RESET);}The full initialization is: hiwdg.Instance = IWDG;hiwdg.Init.Prescaler = IWDG_PRESCALER_256;hiwdg.Init.Reload = 4095;hiwdg.Init.Window = 4095;HAL_IWDG_Init(&hiwdg);According to the reference manual, with Prescaler = 256 and Reload = 4095, I expect a wat

Connected an USB microphone to an H743 as host and it streams mic audio perfectly at 48 KHz for around 5 seconds then the data freezes.SOF is still being called as is AudioHost_IsoDataReadyISR() from the STM IRQ driver, DMA is running (its set to use DMA, I tried without but same behaviour), but the same 96 bytes are transfered every uS: I can clear the receive buffer but it gets refilled with the same data.  Attempts to re-init the pipes etc etc fail to restore streaming.Also, any pause in the servicing of the call to AudioHost_IsoDataReadyISR() results in exactly the same repeat data arriving.This is my own code based on STM’s examples, as I said it runs perfectly for many seconds, if I unplug the microphone it runs again when plugged back in for the same good few seconds.Is there an approved way to restore audio streaming without a full reset when there is an occasional timing glitch in servicing the AudioHost_IsoDataReadyISR() call?

Hi, everyone,I'm trying to implement USB CDC on an STM32H5E5 board using the classic USB device middleware. I followed another community thread that provides the steps to do this: How to Use STMicroelectronics’ Classic USB Device Middleware with the New STM32 Families:  When compiling the code, I encountered some errors at this point in the library: USBD_StatusTypeDef USBD_LL_Init(USBD_HandleTypeDef *pdev){pdev->pData = &hpcd_USB_DRD_FS; HAL_PCDEx_PMAConfig((PCD_HandleTypeDef*)pdev->pData , 0x00 , PCD_SNG_BUF, 0x40);HAL_PCDEx_PMAConfig((PCD_HandleTypeDef*)pdev->pData , 0x80 , PCD_SNG_BUF, 0x80);HAL_PCDEx_PMAConfig((PCD_HandleTypeDef*)pdev->pData , CDC_IN_EP , PCD_SNG_BUF, 0xC0);HAL_PCDEx_PMAConfig((PCD_HandleTypeDef*)pdev->pData , CDC_OUT_EP , PCD_SNG_BUF, 0x100);HAL_PCDEx_PMAConfig((PCD_HandleTypeDef*)pdev->pData , CDC_CMD_EP , PCD_SNG_BUF, 0x140); return USBD_OK;}The error messages are as follows Description    Resource    Path    Location    Type'PCD_SNG_BUF' u

Hi ST Community,I am currently working on an analog sensor acquisition project using the NUCLEO-N657X0-Q (STM32N657X0) board on STM32CubeIDE (version 1.19.0). I am attempting to read a Keyes pressure sensor via ADC1 on PA1 (ADC1_INP1).Physical Wiring & Setup Sensor Connections: The pressure sensor is physically wired to: VCC -> Board 3.3V GND -> Board GND Signal Out -> PA1 (bridged with a 1/2 resistor divider to ground to ensure the voltage never exceeds 1.8V). CN12 Jumpers Connected: Pin 13 / Pin 14 (VDDA1V8) is connected with a jumper cap to supply 1.8V to VDDA. Pin 11 / Pin 12 (VDDIO) is connected with a jumper cap.  STM32CubeMX Configurations VREFBUF: Configured as Disable (since the NUCLEO board provides an external 1.8V reference to VREF+). Security & RIF (RIFSC Panel): ADC1: Configured as Non-Secure, Unprivileged (unchecked), Unlock (unchecked), and assigned to the Application context. GPIOA: Configured as Non-Secure, Unprivileg

Hi everybody,I’m struggling with the lwip stack in order to get it working with freertos.I had succesfully achieved to bring up the connection and optain an ip in dhcp mode and ping the board in bare metal mode, now I switched to freertos and I’m no longer able to send discovery packets on the network.I followed the instructions stated here stm32-hotspot/STM32H7-LwIP-Examples: Ethernet examples using LwIP + FreeRTOS for STM32H7 Discovery and Nucleo boards and tried to copy .ioc configuration from H745 example but I still have the same problem, the phy connection goes up but I cannot obtain the IP address from dhcp server. I’m monitoring the network activity with wireshark but there is nothing coming from the board mac address (in bare metal mode I was able to see dhcp negotiations).Please find the attached files in order to check what happens and addres the possible issue.My configuration: STM32CubeIDE Version: 2.2.0STM32CubeMX Version: 6.17.0STM32Cube FW_H7 V1.13.0PS: please note that

When using the ISP IQTune application to generate ISP parameters for the STM32N6 DCMIPP, the Auto White Balance expresses an error that I believe is incorrect. The error claims that AWB cannot start becase the R/B ratios for white balance must decrease, as the color temperature increases. The ratio IS decreasing, as shown in the image below.When the temperature is 5100K, the R/B ratio is 2.1/1.9 = 1.105When the temperature is 3800K, the R/B ratio is 2.3/1.9 = 1.210Thus, as the temperature increases, the R/B ratio decreases. Either this is wrong, or I’m missing a key component of this calibration process. 

I am using SPI6 on an STM32H562 to write data to a WS2812 LED strip. The following code is called once per second to  write the data: LOGIF ("bytes left=%d", GPDMA1_Channel2->CBR1); LOGIF ("TXC %d", (WS2812_SPI.Instance->SR & SPI_SR_TXC) != 0); LOGIF ("ready=%d", HAL_SPI_GetState(&WS2812_SPI)== HAL_SPI_STATE_READY); if (HAL_SPI_GetState(&WS2812_SPI) != HAL_SPI_STATE_READY) { LOGIF ("error=%d", HAL_SPI_GetError(&WS2812_SPI)); HAL_SPI_Abort (&WS2812_SPI); } HAL_SPI_Transmit_DMA (&WS2812_SPI, spi_bytes, RESET_BYTES + nvalues * BYTES_PER_FRAME); Here is the log output for the first two calls:[101] ws2812 75: bytes left=0[101] ws2812 76: TXC 1[101] ws2812 77: ready=1[201] ws2812 75: bytes left=0[201] ws2812 76: TXC 1[201] ws2812 77: ready=0[201] ws2812 79: error=0The first time, GetState reports READY, but the second time it does not, even though bytes_left is zero and TXC is 1, so an Abort is required before the next transmit. Unfortunat

I currently have two boards equipped with different specific models of N6, namely STM32N647X0H3Q and STM32N657X0H3Q. I have an IDE project for testing the memory-mapped functions of each of these two chips.The problem lies in that this project can be implemented on the STM32N647X0H3Q in a manner similar to:  data = *(volatile uint8_t *)0x70100000;Such code reads the content from the external FLASH. However, on the STM32N657X0H3Q, it is impossible to read. The specific manifestation is that when I run this line of code in the debug mode, the program directly jumps tovoid SysTick_Handler(void)and the debugging connection is disconnected, as shown in the following figure. I have wondered whether it was an issue with the external FLASH soldering, or a problem with the PCB traces (my two circuit boards were not produced on the same PCB. The circuit board with STM32N647X0H3Q was purchased from the internet, while the one with STM32N657X0H3Q was designed based on the schematic diagram of the

Using the latest CubeMXIDE, CubeIDE, and drivers.Custom hardware driving an ILI9341 through SPI1 Driver (attached) writes column and page  registers, writes RAMWRITE command, and then transfers in one of three methods:  blocking, IRQ, and DMA.blocking works fine, so the hardware and commands are proper.IRQ and DMA do not work.  Working specifically on DMA at the moment.Software for the driver next: case ROTATE_180:{// checked valid// new design driver, landscape mode, draws left to right// note: DISPLAY IS IN native landscape MODE// range is 0-319 and 0-239// reverse X if not commented out// data.x0 = 319-data.x0;// data.x1 = 319-data.x1;// reverse Y if not commented out// data.y0 = 239-data.y0;// data.y1 = 239-data.y1;minmax (data.x0, 0, 319);minmax (data.x1, 0, 319);minmax (data.y0, 0, 239);minmax (data.y1, 0, 239);if (data.x1 < data.x0) swap(data.x0,data.x1);if (data.y1 < data.y0) swap(data.y0,data.y1);#ifdef _LVGL// com_addr[0] = ILI9341_PASET;// com_data[0] = (319-data.x1) &