I'm trying to set up communication between the codec and the cm4 using the stm32mp157f-dk2 dev board. Debugging in engineering mode.I've set up the gpio, i2c1 and sai2 ports for the CM4 using cubemx, but the code fails when trying to send the require...
Hi all,I have been working with STM32MP157 chipset.I am currently trying to flash the OpenSTLinux to the SDCard using STM32CubeProgrammer inside VMWare.However, it failed in the middle of flashing.Can anyone tell me what I should do?Thank you
Hi,I've encountered some issues in trying to debug OpenAMP_TTY_echo project from STM32MP1 Starter Package.Here is the output log :Working on STM32CubeIDE v1.4.0 on Linux Ubuntu 20.0.4.1 (64 bit) via a virtual machine. Also tried on a Windows 10 sessi...
Hello, I've got a board with an STM32 MP CPU and I have to reduce the size of the final image to leave enough space on the NAND memory for a dual rootfs setup. The idea is to remove the alsa layer because I don't need the audio part. I tried to add t...
Hello,I have 7 ADC channel , and its configue as interrupt. But the interrupt each is get generated for different condition how I can check the which ADC channel interrupt is get generated which I have to use the function for distinguish the ADC chan...
I've followed all the steps from:https://wiki.st.com/stm32mpu/wiki/STM32MP15_Discovery_kits_-_Starter_Packagehttps://wiki.st.com/stm32mpu/wiki/PC_prerequisiteshttps://wiki.st.com/stm32mpu/wiki/STM32MP1_Distribution_PackageCreating openstlinux-5.10-du...
Hi everyone,I am thinking about using STM32MP1 for a smart wearable device, like a smart watch to run some machine learning algorithm. is it possible? is the battery able to support MPU?Does anyone know any product already used STM32MP1? it would be ...
Hello,I tried to enable spread spectrum for PLL1 by adding a csg line to the TF-A DeviceTree:pll1:st,pll@0 { compatible = "st,stm32mp1-pll"; reg = <0>; cfg = < 1 49 0 1 1 PQR(1,0,0) >; csg = < 60 600 SSCG_MODE_CENTER_SPREAD >; };I tried several d...
Hi,on a custom board with a STM32MP153AABxx and a W63AH6NBV 1Gbit LPDDR3 memory I am failing to initialise the DDR properly. I made the required changes to the upstream u-boot device tree files, added support for UART8 debug console and some minor th...