Hi. I guess I need some help with flashing the STM32MP157F-DK2. I wanted to use the PKCS#11 TA. But calling$ pkcs11-tool --show-info --module /usr/lib/libckteec.so.0gives me the error that no pkcs11-tool is found. After some research I found out that...
Take MYIR’s MYD-YF13X and the STM32MP135F-DK as examples to share training course on how to use STM32CubeMX combined with the developer package to implement the booting of the minimal system.https://www.myirtech.com/news_list.asp?id=8771. Development...
Still trying to get a custom board with a STM32MP151AAC and 512MB ram to boot from eMMC. Switched to using this guide.After various new issues (one of them being this), I managed to bitbake a set that I'm able to fully program with CubeProgrammer.How...
On STM32MP1 discrete power. 512MB DDR , TF-A & OPTEE configure in SYSRAME/TC:0 0 Panic at core/arch/arm/plat-stm32mp1/cpu_opp.c:106 <set_clock_then_voltage>Log attached.This message seems to unique for stm32mp1 in OP-TEE code. no other platform sou...
Hi All,I have an question when i used STM32MP157.I encountered an issue when using DMA to store the values of ADC conversions.When I store the data from the ADC_DMA_Buffer to the ADC_DATA_Buffer in the HAL_ADC_ConvCpltCallback() function.Then check t...
When we use the PMIC values from DK2 example.1 . ERROR: regul ldo3: max value 750 is invalidWARNING: register_pmic:600 failed to register ldo3PANIC at PC : 0x2fff05cb2 Next we tried setting the ldo3 max, min values to 3V and 1.8V and it was working ...
Hi, I have an STM32MP135F-DK board, and I want to set LDO2 and get an output voltage of 3.3V. I have read a document ( Integration of STM32MP13x MPU product lines and STPMIC1D / STPMIC1A on a wall adapter supply) which states that LDO2 must be set af...
My question is what the recommended values are for STM32MP151CAA3T (see image for Altium xsignals creation for the routing).I am currently doing routing and I could not find all this information in the datasheet.
Hello. I need to integrate a TI SN65DSI83 bridge with a DK2 board and one of the requirements of that bridge is to drive the data lanes to LP-11 state. What is the procedure to make that happen? I am assuming I need to make changes to dw-mipi-dsi / d...
Hello ST community,I am designing a board with STM32MP135 CPU and DDR3L based from STM32MP135F-DK.DDR stress test passed successfully and tf-a files are adjusted to have I2C4 on pins used in my design (SCL on PB13 and SDA on PB7).When I flash board t...
