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Title: ST67W611M1A6BTR – Are BOOT and UART required when using the factory firmware without modification?Hello,I am designing a custom board using an STM32G474 as the host MCU and an ST67W611M1A6BTR as the Wi-Fi/Bluetooth network coprocessor.I intend to use the standard X-CUBE-ST67W61 software and communicate with the module through the SPI/AT interface. I do not intend to develop or debug custom firmware running inside the QCC743 SoC.After reviewing the ST67W611M1 datasheet, the B2413 reference schematic, AN6316, and the ST hardware setup wiki, I would like to clarify the required programming and debug connections.In the B2413 schematic, module pins 1 to 4 are shown as: Pin 1: JTMS Pin 2: JTCK Pin 3: BOOT_WW6 / JTDO Pin 4: JTDI However, in the ST67W611M1 datasheet, pins 1, 2, and 4 are marked as RESERVED and are required to be left unconnected for the A6B/A6U variants.My questions are as follows: Does every production ST67W611M1A6BTR module contain a usable mission firmware imag

From the documentation it sounds like the STM32WB vectors to the reset hander when it exits STANDBY and lower power modes, correct? 

Subject: X-NUCLEO-CCA02M2 PDM-over-SPI capture issue on STM32MP257F-EV1 - discontinuous clocking suspectedHello ST Support Team,I'm working with an X-NUCLEO-CCA02M2 dual PDM microphone expansion board interfaced to an STM32MP257F-EV1 evaluation board, and I'm running into a data-quality issue I'd appreciate your guidance on.Setup:- X-NUCLEO-CCA02M2 board, using onboard microphone M2 (MIC_PDM34_OB), routed via SB10 solder bridge to CN10 pin 15- Connected to the STM32MP257F-EV1's SPI8 peripheral in Linux userspace via /dev/spidev, MISO on mikroBUS pin 5 (PZ1), clock supplied from SPI8's own SCK (mikroBUS pin 4, PZ2) to CN10 pin 29 (MIC_CLK_NUCLEO)- Power from CN6 pin 3 (3.3V), GND from CN6 pins 6/7- Capturing via repeated SPI read calls (spidev, bufsiz increased to 65536, Mode 0)Issue:Short, isolated SPI captures (around 2000 bytes at a time, with pauses between reads) show clearly responsive behavior - bit density in the captured stream increases noticeably when speaking near the microp

Where can I find STM32H5F5J-DK demonstration firmware full source code?

Hi,On STM32U575CGU3, I see a reproducible +200 µA increase in current after calling MX_ADC1_Init() once. Even after HAL_ADC_DeInit(), ADC reset, and disabling VddA, the additional current does not return to the original baseline.Here is the minimal code:cint main(void){ HAL_Init(); SystemClock_Config(); MX_GPIO_Init(); MX_GPDMA1_Init(); MX_ADC1_Init(); // +200uA increase MX_OCTOSPI1_Init(); MX_SPI1_Init(); MX_USB_OTG_FS_PCD_Init(); MX_USART1_UART_Init(); MX_ICACHE_Init(); // ADC Disable HAL_ADC_DeInit(&hadc1); __HAL_RCC_ADC1_FORCE_RESET(); __HAL_RCC_ADC1_RELEASE_RESET(); HAL_PWREx_DisableVddA(); while (1) { __NOP(); }}Questions Has anyone observed similar behavior on U5 devices (ADC bias or VREFBUF staying active after initialization)? Are there known conditions where ADC/VREFBUF analog blocks remain powered even after DeInit and VddA OFF? Any hints on additional steps required to fully shut down the analog domai

I built up an application using STM32CubeMX and FreeRTOS but left BLE disabled. Now, I want to add that connectivity.I went back into CubeMX and turned on BLE with the HeartRate application. The only thing I changed were ASYNC_PRESALER and SYNC_PRESCALER so that the RTC time keeping would be correct.Now, whenever I allow appe_TI_Init() to execute, I get an IPCC_C1_RX_IT interrupt (VECTACTIVE = 0x3C) as soon as osKernelStart() is called. If I comment out the call to appe_TI_Init(), the rest of the code operates as before. Yes, I know that BLE is not running.What have I missed that causes the interrupt when it is not handled?Thanks

Hi,We are currently facing serious supply shortage issues with the MX66LM1G45GXDI00 flash memory.As a potential solution, I am considering modifying the design to use an external Quad-SPI flash memory instead of the current Octo-SPI flash.My understanding is that this change may require us to develop or modify the following:Quad-SPI flash drivers for the STM32U5G9 Flash initialization and memory-mapped access configuration Programming/firmware download utilities Production programming support Bootloader and/or application changes, if required TouchGFX/external-memory configuration, if applicableCould you please let us know whether suitable Quad-SPI flash drivers, BSP components, or programming utilities are already available that we could leverage, particularly for the STM32U5G9?I would also appreciate your comments on the key challenges and any guidelines or recommendations you may have for this development effort. In particular, I would like to understand the potential impact on memo

Dear all, I found an interesting effect using the CubeL4 and CubeMX generated files for a STM32L496 and use ADC1 and ADC3 (not simultaneously): What we do: We turn the ADCs on only when we sample data, otherwise they are turned off.  To turn the ADC off, we use HAL_ADC_DeInit which calls HAL_ADC_MspDeInit. Issue: HAL_ADC_MspInit and HAL_ADC_MspDeInit keep track of active ADCs through static variable HAL_RCC_ADC_CLK_ENABLED. Init increases the count, deinit decreases it. If, however, init and fails but we still call deinit the count wraps around to 0xFFFF FFFF - upon next init it wraps around to 0, but then the ADC clock is not turned on and initialization fails again. See the code snippets below: HAL_ADC_MspInit HAL_RCC_ADC_CLK_ENABLED++; if(HAL_RCC_ADC_CLK_ENABLED==1){ __HAL_RCC_ADC_CLK_ENABLE(); }   HAL_ADC_MspDeInit HAL_RCC_ADC_CLK_ENABLED--; if(HAL_RCC_ADC_CLK_ENABLED==0){ __HAL_RCC_ADC_CLK_DISABLE(); }   Suggestion: Check for underflow of&nbsp

I already posted this topic but I got low engagement.XIP template works on 50Mhz clock for XSPI and it works good. If I bump up the XSPI frequency to 200Mhz without modifying anything else, it fail at BOOT_Application() in FSBL. XSPI setup should remain the same for both 50Mhz and 200Mhz if I’m not mistaken.Dummy cycles are set weirdly also. I print XSPI CLK, PRESCALER and dummy cycles setup before BOOT_Application(). CLK = HAL_RCCEx_GetPeriphCLKFreq(RCC_PERIPHCLK_XSPI2); PRESCALER = (XSPI2->DCR2 & XSPI_DCR2_PRESCALER_Msk) >> XSPI_DCR2_PRESCALER_Pos; printf("FSBL CLK: %lu \r\n", CLK); printf("FSBL PRESCALER: %lu \r\n", PRESCALER); printf("FSBL Dummy: %lu \r\n", XSPI2->TCR); /* USER CODE END BSP */ /* Launch the application */ if (BOOT_OK != BOOT_Application()) { Error_Handler(); }XIP template example works (FSBL prints in FSBL, and Appli prints in APPLI)And when set at 200Mhz, it takes a while (~20s) before reaching BOOT_Application where

Hi there, can someone explain what the GP configuration of the STM32N6 is? I can only find information that the dedicated pinout is different (Datasheet Chap.7) but no more information whether this has any influence on the functionality. Is there any reason why the STM32N657H3QG is not available in “Tape and ring”  packaging?Thanks Mitja

Hello,I am getting a hard fault while trying to integrate TouchGFX into a Zephyr application.The application is secure-only and the screen design is very simple: it contains a single screen with one box. When I debug the application, the hard fault occurs in the touchgfx::Application constructor (so I cannot debug), which is called indirectly through:FrontendHeap& heap = FrontendHeap::getInstance();I have already tried increasing the following Zephyr configuration values (CONFIG_MAIN_STACK_SIZE and CONFIG_HEAP_MEM_POOL_SIZE).CRC is enabled. DMA2D is disabled for now — the “Use DMA2D Accelerator” option is set to No in the X-CUBE-TOUCHGFX package, to keep the setup simple and eliminate one possible source of issues.The framebuffers are aligned and placed across AXISRAM3, AXISRAM4, and AXISRAM5The setup is as custom board with:MCU: STM32N65XXZephyr version: 4.4TouchGFX version: 4.26.1Zephyr SDK: 1.0.1I would appreciate any help, suggestions, or debugging directions.Thanks in advance.

Hello everyone,I’m using Nucleo STM32N6 for a project of mine, and I used template XIP to begin with.In template XIP, clock frequency of the XSPI2 is set to 50Mhz without any prescalers, and VDDIO3 is set to 1 (1.8V). That setup works fine for XIP up to 85Mhz clock frequency, but above that at BOOT (00) it fails as soon as it tries to jump to a application. I haven’t been able to resolve this problem. Is it setup, or something with EXT_MEM middleware?In MX25 datasheet it can be seen that frequency heavily depends on dummy cycles, and 86Mhz corresponds to 8 dummy cycles, but on 200Mhz it requires 20. In EXT_MEM setup there is a 8D8D8D case where i go into during setup and it sets object to 20 dummy cycles, but I’m not sure is it successful in actually forcing that setup. Any help would be welcome. 

I am evaluating STiRoT + OEMuRoT on an STM32H5F5J-DK using the STM32CubeH5 v1.7.0 package by following the ST documentation:Security:OEMiRoT OEMuRoT for STM32H5 - stm32mcu How to start with STiRoT_OEMuRoT on STM32H573 - stm32mcu Getting started with STiRoT (ST immutable Root of Trust) for STM32H5 MCUs - Application noteThe board can be provisioned and the following currently work correctly:-  STiRoT starts successfully.-  OEMuRoT starts successfully.-  Secure and non-secure applications are authenticated and executed normally.-  Application updates (swap mode) through the OEMuRoT flow are functional.The next step is to confirm whether the OEMuRoT authentication and encryption keys can be updated after the board has already been provisioned, without reprovisioning the complete board. Test procedures as below:Generate new OEMuRoT keys Using STM32TrustedPackageCreator (TPC), a new set of OEMuRoT authentication/encryption keys were generated through ‘OEMuRoT_Config_Keys.xml’ Generate the O

UL have requested CDRH certificate for VL53L8CX. Can anyone help?

Hello ST, I wonder if the top marking of STS10P4LLF6 is indeed 10P4L.Based on the latest datasheet (Rev 5, issued in Jan 2021), the top marking code is 10P4L.However, we received STS10P4LLF6 with “10K4L” but the date code is 2447. Could you please explain how this could happen?Best regards,

Hi, i am using the TCPP03-M20 for the first time. This device is stand alone. i have the device setup for 5V, which is all that is required. there is no power to the device initially when connected to the USB-C port. CC1c and CC2c pins are at around 1.65V. i do not see any voltage on Vbus. have attached the schematic section for this circuit. .If i apply 3.3v to Vcc_Vconn VBUS is still 0V. Any help appreciated. Mark

hi I’m using the board named NUCLEO-N657X0-Q and I want to use feature of FDCANbut I couldn’t find pin map for that where is the pin number for FDCAN? Thanks

I am struggling to get TouchGFX running on my custom board. The processor is the STM32H7A3RGT and I am driving a 320 pixel x 960 pixel LCD display. I have allocated a frame buffer in internal RAM and have LTDC producing PCLK, DE, VSYNC and HSYNC. I have configured my firmware using CubeMX to use FreeRTOS. I added a call to MX_TouchGFX_Process in my default task but it gets stuck on an assert. Specifically here:Call StackThe reason it gets stuck is because pxQueue->ixItemSize is not zero !ASSERT in xQueueSemaphoreTakeWhat am I missing ?Andy

environmentSTM32H743IIT6   FK743M2-IIT6SRAM IS42S16160J  External 16-bit 32M byte SDRAMExternal QSPI driver W25Q64LCD 4.3”  RGB043M2-800*480*VI1.2 I have 2 problems with this module if I write a line on line y = 0 ok but if y = 10 see wrong lcd output with many pixels blink   if I use the DMA to write on lcd no output   If I use 0x24000000 instead of 0xC0000000 like FRAMEBUFFER_ADDRESS both lines are ok but the 0x24000000 address cannot be used to fill oll the 800x480 lcb areaConsider that this BSP_LCD_Clear() is able to fill alll the lcd area without problems. void BSP_LCD_Clear(uint32_t Color){ uint32_t index = 0; // Estrae i componenti R, G, B dal colore a 32-bit uint8_t r = (Color >> 16) & 0xFF; uint8_t g = (Color >> 8) & 0xFF; uint8_t b = Color & 0xFF; // Converte in RGB565 (16-bit) uint16_t color16 = ((r >> 3) << 11) | ((g >> 2) << 5) | (b >> 3); volatile uint16_t *pFB = (uint16_t *)0xC0000000; for(

We are using an STM32C091CCT6 with the internal HSI (48 MHz) configured as the system clock.Our application generates a volume-based pulse output using TIM14 in one-shot compare mode. The output pulse frequency is derived from flow rate, and the receiving equipment measures the number of pulses generated per second. Therefore, maintaining an accurate 1-second timing window is important for correct pulse frequency and flow indication.Timer ConfigurationMCU: STM32C091CCT6 Clock source: Internal HSI (48 MHz) SYSCLK: 48 MHz TIM14 clock: 48 MHz Prescaler: 47 Timer resolution: 1 µs per tick Pulse window: 1,000,000 timer ticks (expected = 1000 ms)ObservationWhen measuring the pulse window using a logic analyser, we consistently observe the following:Expected pulse window: 1000 ms Measured pulse window: ~995 ms Timing error: approximately 0.5%This timing difference directly affects the pulse-per-second measurement used by downstream equipment.Current WorkaroundTo compensate for the observed ti

The MCU works fine the first time it gets programmed. However, after one power cycle, it freezes completely after an external  interrupt happens. Doesn’t even enter the error handler. I have SMPS enabled. Thanks for your help int main(void){ /* USER CODE BEGIN 1 */ /* USER CODE END 1 */ /* MCU Configuration--------------------------------------------------------*/ /* Reset of all peripherals, Initializes the Flash interface and the Systick. */ HAL_Init(); /* USER CODE BEGIN Init */ /* USER CODE END Init */ /* Configure the System Power */ SystemPower_Config(); /* Configure the system clock */ SystemClock_Config(); /* USER CODE BEGIN SysInit */ /* USER CODE END SysInit */ /* Initialize all configured peripherals */ MX_GPIO_Init(); MX_RTC_Init(); MX_UART4_Init(); /* USER CODE BEGIN 2 */ GreenLEDOn(); HAL_Delay(5000); GreenLEDOff(); /* USER CODE END 2 */ /* Infinite loop */ /* USER CODE BEGIN WHILE */ while (1) { if(!HAL_GPIO_ReadPin(V_Fu_Trig_GPIO_Port, V_Fu_T

EnvironmentBoard: NUCLEO-C562RE MCU: STM32C562RET6 STM32CubeMX2: [your version] Project type: CMake Middleware: FreeRTOS configured through STM32CubeMX2ProblemWhen a FreeRTOS task is configured in STM32CubeMX2, the task creation code and task entry function are generated in:generated/middleware/freertos/mx_freertos_app.cThe official ST tutorial for using FreeRTOS with STM32CubeMX2 also shows application logic being implemented directly inside the generated task function:https://community.st.com/stm32-mcus-60/how-to-use-freertos-with-stm32cubemx2-161926However, after modifying the generated task function and running IDE Project Generation again, STM32CubeMX2 detects mx_freertos_app.c as an externally modified generated file and reports a conflict.The original file can be preserved as a backup when "Overwrite with backup" is selected, so the application code is not silently lost.However, this means that normal project regeneration requires conflict handling and potentially manual merging

I built a low-power board using an STM32L031. The code I use to enter STOP mode and STANDBY mode is shown below.In STANDBY mode, the board consumes about 2 µA. However, in STOP mode, it consumes about 90 µA, and I am not sure why there is such a large difference.The circuit only consists of the STM32L031 and the power supply section. Could there be a problem with my code? Why is the current consumption so much higher in STOP mode than in STANDBY mode? void EnterStopMode(void){ __HAL_GPIO_EXTI_CLEAR_IT(GPIO_PIN_2); HAL_NVIC_ClearPendingIRQ(EXTI2_3_IRQn); HAL_SuspendTick(); HAL_PWR_EnterSTOPMode(PWR_LOWPOWERREGULATOR_ON, PWR_STOPENTRY_WFI); SystemClock_Config(); HAL_ResumeTick();}void EnterStandbyMode(void){ __HAL_RCC_PWR_CLK_ENABLE(); __HAL_PWR_CLEAR_FLAG(PWR_FLAG_SB); HAL_PWR_EnterSTANDBYMode();}

Hi,Chip: STSPIN32G0602Q (STM32G031 core + integrated 3-phase gate driver)Board: custom BLDC driver board, powered via 115VAC through an isolation transformer into the board's own AC input; the board's onboard PFC/rectifier stage converts this to the internal DC buses (HV+ ~400V DC bus, and VBUS ~50-120V DC, which is the rail actually switched by the MOSFETs under test)Purpose of this test: end-of-line (EOL) production test — statically turning on one high-side MOSFET and one low-side MOSFET on different phases (e.g. U-high + V-low) for a short, controlled period, then checking output voltage/current, to verify each MOSFET pair switches correctly before the board ships. This is a functional pass/fail check, not normal motor operation — no continuous PWM switching or motor commutation is involved.Problem: TIM1's gate outputs never turn on. Root cause traced to: BIF (break flag) is always set, so MOE can never be enabled.What happensI start a TIM1 channel (HAL_TIM_PWM_Start + HAL_TIMEx_PW

I have written compact assembler code, with assistance from ChatGPT and Gemini, for the STM32H5E5ZJ to raise its core voltage to VOS0, configure PLL1 and PLL2 and switch system clock to 248MHz.Any comments much appreciated as to the sequencing and safety of this code or any problems seen please.It is tested and working reliably and occupies less than 512 Bytes. At the moment it runs in RAM and only after reset (not to be called later. To run in Flash it must also raise Flash wait states.  The code also configures MCO1 and MCO2, configures SPI1 as master, running at 4MBaud, it puts SPI1 into a delayed loop sending test data readings from TIM2.SPI1 is configured to use PA4 SPI1_NSS, PA6 SPI1_MISO, PA7 SPI1_MOSI and PG11 SPI1_SCK.Any comments much appreciated as to the sequencing and safety of this code.I have used ST Core MX extensively to help build the code by reading MX generated C code. Here is the code, anyone is free to make use of it as a supplement to official ST code if they so