STM32N6 Nucleo fails to XIP with 200Mhz clock

[GoranDragovic]

I already posted this topic but I got low engagement.

XIP template works on 50Mhz clock for XSPI and it works good. If I bump up the XSPI frequency to 200Mhz without modifying anything else, it fail at BOOT_Application() in FSBL. XSPI setup should remain the same for both 50Mhz and 200Mhz if I’m not mistaken.

Dummy cycles are set weirdly also. I print XSPI CLK, PRESCALER and dummy cycles setup before BOOT_Application().

  CLK = HAL_RCCEx_GetPeriphCLKFreq(RCC_PERIPHCLK_XSPI2);
  PRESCALER =
          (XSPI2->DCR2 & XSPI_DCR2_PRESCALER_Msk)
          >> XSPI_DCR2_PRESCALER_Pos;

  printf("FSBL CLK: %lu \r\n", CLK);
  printf("FSBL PRESCALER: %lu \r\n", PRESCALER);
  printf("FSBL Dummy: %lu \r\n", XSPI2->TCR);
  /* USER CODE END BSP */

  /* Launch the application */
  if (BOOT_OK != BOOT_Application())
  {
    Error_Handler();
  }

XIP template example works (FSBL prints in FSBL, and Appli prints in APPLI)

And when set at 200Mhz, it takes a while (~20s) before reaching BOOT_Application where it fails.
 

XIP template example with 200Mhz set 

It sets it to 50Mhz, but it slows down tremendously and it fails.

Any help would be welcome in overcoming this!

Edit:
I also followed this guide to program it:
 

 

[GoranDragovic]

I managed to make it work.

So even that OPT124 was set at 0x00018000 (VDDIO2 and VDDIO3 at 1.8V), PWR->SVMCR3  register Bit 26 VDDIO3VRSEL and Bit 25 VDDIO2VRSEL were set at 0. After configuring them with:
 

PWR->SVMCR3 |= PWR_SVMCR3_VDDIO3VRSEL;

PWR->SVMCR3 |= PWR_SVMCR3_VDDIO2VRSEL;

200MHz started working. 

Big help was this thread 

• STM32N6 XIP from OctoFlash does not work depending on AXI-clock