MX 6.5 and cubeIDE 1.9 have bug on running ADC for stm32h743vit6 Revision V

[SeyyedMohammad]

Clock configuration for ADC is always grayed out also we can't chose prescalers (synchronous and asynchronous) for ADC kernel. ADCSEL can't change from IDE MX clock configuration, but changing it from 00 to any other in debug session before executing ad enabling will not cause peoblem.

Also no option to activate boost option which is related to ADC kernel frequency.

Please correct ADC clcok distributing problems and add boost options according to revisions for both.

Also clock distribution activation consequence from activating adc doesn't work,

Here PLL3R doesn't activate although the adc has been activated.

Clock parameter must be added in this form:

clock source: sync/async

clock prescaler: (the numbers are depends on two parameter above)

Calculate final clock feed to ADC: ----

Boost option. and view it's consequesnces on VDDA

[Pavel A.]

​@SeyyedMohammad​ Yes, changed the . ADCx.prescaler manually in the .ioc.

IMHO the result shows that Cube recognizes relation between SYNC/ASYNC and the ADC clock mux - but selection of the mode isn't done correctly.

@Imen DAHMEN​ Could you forward the STM32H7 ADC clock configuration issue to the team, please?

Begging pardon for the grammar. My first language was Fortran IV.

[SeyyedMohammad]

Also ADC refuses enabling on CKMOD 00 and ADCSEL 00 (refuze to enable on default setting).

[Pavel A.]

Yes this looks like incomplete re-work of ADC common settings in the latest CubeMX/IDE.

In CubeMX v.6.5 the ADC clock selection disappeared from parameter settings.

It should be in "Common settings" - but it is not. And the ClockPrescaler is not generated in the .ioc, neither in code.

[SeyyedMohammad]

Also I think voltage scale is irrelevant of this boost, as RM told:

I/O analog switches voltage booster The I/O analog switches resistance increases when the VDDA voltage is too low. This requires to have the sampling time adapted accordingly (refer to the datasheet for electrical characteristics). This resistance can be minimized at low VDDA by enabling an internal voltage booster with BOOSTE bit in the SYSCFG_PMCR register.

[Imen.D · Accepted solution]

Hello and Thank you for having reported this issue.

I escalated this request internally to involved people to take a closer look at the problem.

Imen

[Hansel]

Cannot delete my original post, so here's some text...