We are using STM32MP!57A processor in our custom board. In this we are unable to read the internal ADC values in our cards. Actually, we initialize the internal ADC pins in cortex-M4 core with support of STM32CUBEMX and debug in CubeIDE...
i am trying flash in SD card for STM32MP157F-DK2. I am getting the error as mentioned below Port configuration: parity = even, baudrate = 115200, data-bit = 8, stop-bit = 1.0, flow-control = off16:56:09 : Activating device: OK16:56:09 : Board : --16:...
Hello everybody,I am developing a custom board strongly inspired by the STM32MP157D-DK1, except that I use a parallel DPI RGB on 24bit display.I use openstlinux-6.1-yocto-mickledore-mpu-v24.06.26.The frequency of "LTDC_CLK" changes by itself after wa...
Hi,I tried to update the DTS to make use of the adapter but unfortunately without success. These are the change I made:hdmi-out { compatible = "hdmi-connector"; type = "a"; port { hdmi_con: endpoint { remote-end...
Hello,I have a STM32MP2 platform with A/B partitioning for TF-A, metadata and FIP.I'm looking for a way to generate a test FIP and install it in FIP-B bank, have TF-A load it, if this FIP contains a bad signature or other error that will prevent Uboo...
Hello,I am trying to generate output with adjustable pulse width using One Pulse mode.The output pin is in a Pull-Up state, with an initial state of High. When One Pulse mode is activated, it outputs a Low signal for the specified duration.However, t...
Even if I route the differential pairs, one pair will always be longer than the other.Should I route an extra path, like a sawtooth or tromebone on the shortest pair to make booth differential pair equal in length?I see that the STM32MP1 dev-kit does...
I created a st-image-qt image using the STM32MP Distribution package and X-LINUX-QT add-on for the STM32MP157F-DK2 board.I could flash this image using the dd command in Linux and my target board is running correctly.On the other side, I created a qt...
Hi,tI am trying to understand maximum PTP clock frequency. On page 5122 of the STM32MP2 the maximal frequency defined as 100MHz, but on page 1037 (RCC section) the maximal clock frequency of clk_eth1_ptp_ref is 200MHz. Which one is correct? Can I hav...
Hi,I am working on STM32MP133FAFx . I have integrated PMIC and getting 1.35V voltage to DDR. I am using bare-metal environment without OSAlso configured required registers for DDR with below values for my hardware,DDR_MSTR 0x00040401DDR_MRCTRL0 0x00...