cancel
Showing results for 
Search instead for 
Did you mean: 

In 'G0, what's the input voltage range of FT_a pin, when analog function switched on?

In 'F4, for FT pins with analog functionality (marked as FT_a in other STM32 families' DS), there's a clear warning, that 5-volt tolerance does not apply when given pin is set to Analog mode:

waclawekjan_0-1710415162561.png

For 'G0, I can't find any such description/restriction in DS; yet I am convinced that similar restriction will apply. Also, as @TDK  pointed out  here, the ADC "schematics" in 'G0 appears to contain a protection diode against VDDA.

To me, this sounds like quite an important issue, which may deserve more than just a footnote in DS (including a treatise in RM, too, in the Analog subchapter of GPIO); but in 'G0 we are left with guessing, which is definitively wrong.

This question probably applies to more/many/all non-'F' families, I haven't checked.

Also, I would like to bring up the difference between "pin set to Analog mode in GPIO" and "pin actually *used* in some analog functionality" (e.g. ADC mux is set to use this pin). This is even more important in the light of the fact that the default setting of GPIO in all newer non-'F' is Analog.

ST, please clarify, and please be meticulous in formulating the restrictions.

Thanks,

JW

@KB-IDEA 

10 REPLIES 10
RomainR.
ST Employee

Hello @waclawek.jan 

In fact, and you're right, the same conditions also apply to G0 (and also all STM32), as the FT_a IOs are referenced to the VDDA.
However, there is a general information mentioned in the AN4899 section 5.2.2 Five-volt tolerant GPIO (FT).

The maximum operating voltage on pin FT_a cannot exceed min(VDDA, VREF+) + 0.3 V.

Best regards,

Romain

To give better visibility on the answered topics, please click on Accept as Solution on the reply which solved your issue or answered your question.

Hi @RomainR. ,

Thanks for your reply.

While it's nice to have a related AN, I feel that allowed input voltage range is something more important, which IMO ought to be dealt with in the DS - at least as a footnote as it is in the case of 'F4. Alternatively, such footnote could point to given AN.

Also, AN4899 5.2.2 says:

> These GPIOs are actually tolerant to VDD + 3.6 V

which is different from what many (most?) STM32 DS say, namely that FT pins are tolerant to VDD + 4.0V. Please clarify.

Also, AN4899 5.2.2 says:

> However, a GPIO is five-volt tolerant only in input mode.

This formulation would exclude from 5V tolerance both Alternate Mode, and the case when GPIO is set in Analog Mode and is not connected to analog functionality (and the latter has paramount importance, as most new STM32 pins are set as Analog after reset). Please reformulate.

Also, AN4899 5.2.2 says (and you've quoted that one, too):

> The maximum operating voltage on pin FT_a cannot exceed min(VDDA, VREF+) + 0.3 V.

Is this an Absolute Maximum, or a Functional one? I.e., if VREF+ < VDDA, and if input voltage on a FT_a pin connected to an analog functionality e.g. ADC, exceeds VREF+ + 0.3V, but is still below VDDA + 0.3V, is it in the risk of permanent damage, or it only impacts functionality, e.g. ADC saturates?

These are IMO important issues, so should AN4899 be authoritative (which, again, it may be, but only if DS points to it explicitly), it shall be written more precisely in these regards than it is now.

This is engineering. Details do matter.

JW

Hello @waclawek.jan 

> These GPIOs are actually tolerant to VDD + 3.6 V
which is different from what many (most?) STM32 DS say, namely that FT pins are tolerant to VDD + 4.0V. Please clarify.

In this case the product datasheet Vin is the reference.

> However, a GPIO is five-volt tolerant only in input mode.

This is correct, the 5V tolerance only applies when the GPIO is configured as input.

> The maximum operating voltage on pin FT_a cannot exceed min(VDDA, VREF+) + 0.3 V.

When the analog input function is activated on GPIO FT_a with an active ADC input, COMP input or OPAMP input, the maximum voltage applied must be less than VDDA (respective of VREF+) + 0.3V.

If this value is not respected, there will be a risk of injection into VDDA or VREF+ by the GPIO. This injection could damage the ADC and all the other analog peripherals powered by VDDA.

I hope that this will clarify the points.

With regards,

Romain,

 

To give better visibility on the answered topics, please click on Accept as Solution on the reply which solved your issue or answered your question.

Hi @RomainR. ,

Thanks for your reply.

I still have my doubts, see previous post.

But if it's so, this definitively should be in the datasheets.

JW

LCE
Principal

But if it's so, this definitively should be in the datasheets.

Not should, but must.

And as you said before, not only as a footnote.

@RomainR. STM32 datasheet is big enough, you can't expect people to read x additional app notes to find basic hardware information.

@waclawek.jan 

May I suggest you look at the DS13866 Rev 4 datasheet for the STM32C0.
In particular table 20 in section 5.2 Absolute maximum ratings. and its note 3 (see below)

RomainR_0-1710764674304.png

We propose to implement this same note in all the STM32G0 datasheet because the two C0/G0 families come from the same platform. It will be integrated in the next datasheet revision.

Thank you for your feedback.

Romain,

 

To give better visibility on the answered topics, please click on Accept as Solution on the reply which solved your issue or answered your question.

Hi @RomainR. ,

Now I am confused.

'C0 is not the best family for this discussion, as it does not have a standalone VDDA, as it is always connected to VDD.

Nevertheless, footnote 3, to which you refer, says, the the maximum voltage on a FT pin used as analog is 4V. Yet VDD=VDDA and VREF+ in 'C0 can be as low as 2.0V for the ADC to function (and these absolute range of VREF+ is in range of -0.3V..VDD+0.4V). That would mean, that according to what you've quoted from AN4899, at the allowed 4V on FT_a, it is surely far above VDDA, and the pin would be damaged by injection.

Can you please comment on this?

Thanks,

JW

Hi,

 

> However, a GPIO is five-volt tolerant only in input mode.

This is correct, the 5V tolerance only applies when the GPIO is configured as input.

So FT pin as open drain output - can only drive/tolerate VDD 3V3  or up to 5V ?

If you feel a post has answered your question, please click "Accept as Solution".

Hello @waclawek.jan ,

 

The AMR (Absolute Maximum Ratings) are there to explain that above a certain voltage/temperature/current the device could be damaged.

Concerning the voltage characteristics values, they are not meant to explain if there is injection or not. Just to give the maximum voltage where the product is not damaged without checking if the peripherals behind will work properly, but just saying that until this voltage the product is not damaged.

 

However the information given in the AN4899 or more particularly in the device datasheet ADC (Vain range) /comparator (Vin range) part are there as operational voltage.

 

I hope my explanation will remove you doubt.

 

Best regards,

 

Simon