In 'G0, what's the input voltage range of FT_a pin, when analog function switched on?

[waclawek.jan]

In 'F4, for FT pins with analog functionality (marked as FT_a in other STM32 families' DS), there's a clear warning, that 5-volt tolerance does not apply when given pin is set to Analog mode:

For 'G0, I can't find any such description/restriction in DS; yet I am convinced that similar restriction will apply. Also, as @TDK  pointed out  here, the ADC "schematics" in 'G0 appears to contain a protection diode against VDDA.

To me, this sounds like quite an important issue, which may deserve more than just a footnote in DS (including a treatise in RM, too, in the Analog subchapter of GPIO); but in 'G0 we are left with guessing, which is definitively wrong.

This question probably applies to more/many/all non-'F' families, I haven't checked.

Also, I would like to bring up the difference between "pin set to Analog mode in GPIO" and "pin actually *used* in some analog functionality" (e.g. ADC mux is set to use this pin). This is even more important in the light of the fact that the default setting of GPIO in all newer non-'F' is Analog.

ST, please clarify, and please be meticulous in formulating the restrictions.

Thanks,

JW

@KB-IDEA 

[RomainR.]

Hello @AScha.3 

A GPIO FT configured in digital output open drain means that the the internal NMOS transistor force ground 0V. Internal PMOS is not used. 
So yes, GPIO can tolerate an external load pulled-up to 5v as long it is into the absolute maximum ratings ranges.

With regards,

Romain,