How to make Ethernet and lwIP working on STM32

Piranha · ‎2019-09-28

This is an umbrella topic where I will collect the key problems and solutions to finally get networking on STM32 working. The issues formatted as bold are the most critical ones.

HAL ETH drivers have been significantly reworked since the following firmware packages: CubeF4 v1.27.0, CubeF7 v1.17.0, CubeH5 v1.0.0, CubeH7 v1.10.0

Series: F1, F2, F4, F7, H5, H7 (all STM32 with Ethernet)

lwIP driver Tx deadlock. [reworked drivers]
Missing compiler and CPU memory barriers. [legacy drivers]
RMII mode not enabled because of lacking SYSCFG synchronization. [legacy drivers]
Unwanted interrupts not masked.
CubeMX generates wrong PHY configuration. [legacy drivers]
Not possible to use a custom PHY driver in CubeMX. [reworked drivers]
Wrong clock source and PLL configuration. [examples]
lwIP driver zero-copy Rx PBUF pool size is inappropriate. [reworked drivers]
CubeMX generates broken lwippools.h file for C++.
CubeMX generates a dysfunctional lwIP application without RTOS.
Unnecessary delay in LAN8742_Init() and link state management in low_level_init(). [reworked drivers]
Unnecessary delays and peripheral reset in HAL_ETH_Init() function.
Multiple flaws in a PTP API implementation. [reworked drivers]
Poorly chosen MDIO frequency limits and scarce documentation.

Series: F1, F2, F4, F7 (older Synopsys basic peripheral)

Many flaws as a result from incorrect porting of the reworked H7 series HAL ETH driver. [reworked drivers]
No DMA access to a data in FLASH memory. [reworked drivers]
Tx complete interrupt not triggered. [legacy drivers] The related documentation is also wrong.
Wrong Tx checksum offload documentation.
Wrong PTP clock source documentation.
Wrong PPS output documentation.

Series: H5, H7 (newer Synopsys QoS peripheral)

Series: F7, H7 (Cortex-M7 CPU)

Flawed MPU configuration and D-cache maintenance in lwIP driver. [reworked drivers]
Overlapping and merged memory regions in linker script files.
Critical spelling errors in linker script files.
The example code in the article "DMA is not working on STM32H7 devices" is flawed in multiple ways.

lwIP API related:

Ethernet link and DHCP management code is not thread-safe. When used with RTOS, the code ignores lwIP requirements described in Common pitfalls and Multithreading.
The example code in the article "How to create project for STM32H7 with Ethernet and LwIP stack working" is not thread-safe. It uses RTOS and lwIP RAW API, but doesn't do lwIP core locking.
Improper use of NETIF and link up/down statuses. The meaning of netif_set_up()/netif_set_down() functions changed in v2.0.0, but ST's code is not updated. Now NETIF must be up regardless of link state, but for a link state only the functions netif_set_link_up()/netif_set_link_down() must be used.
Improper use of DHCP client. The code is for an outdated version of DHCP client, which needed external state management. Current versions fully manage the state internally. Monitoring of the state and reporting IP addresses can be done by a callback set up with netif_set_status_callback() without wasting a thread on it.

Other related information:

Another detailed topic by @alister: "[bug fixes] STM32H7 Ethernet". While mostly dedicated to H7 series, it also has a good amount of information relevant to all Ethernet/lwIP related development.

Open source zero-copy Ethernet/lwIP driver example. The hardware driver is for F2 series, which means that it's almost the same for all Fx series. The lwIP related code and general ideas are still valid for all series.

My other closely related topic: "Actually working STM32 Ethernet and lwIP demonstration firmware". As that topic is currently unavailable, because ST still has not moved it to the new forum, I am attaching a PDF copy of that topic and the related firmware files to this topic.

Parvez Akhtar · ‎2023-05-07

Thank you Piranha,

I appreciate your response. I got the link now.

Just a small feedback about the link provided in main topic No DMA access to a data in FLASH memory, it talks about DMA access to flash memory, which is an ultimate root cause of the issue. Its definitely helpful for those who know the root cause of the issue (like due to DMA access to flash memory). But people like me normally search for specific issues like HTTP is not working, deadlock, dma error etc.. for a quick solution. I was instead focusing more on "lwIP driver Tx deadlock" which is also a related issue.

Anyway, you have given lot of comments and remarks on various issues related to ethernetif.c driver for STM32F4. that's why I thought to comment here. Thank you again for help. Waiting for proper solution from STM32 in June.

Regrads,

Parvez Akhtar

lavanya · ‎2023-07-28

Hello @Piranha ,

Ethernet not working with cube Mx 6.8.1 but same configuration of cube Mx working with 5.4 version. for STM32F746 board firmware used STM32Cube FW_F7 V1.17.0

help me out to fine any solution on this.

thanks

regards Lavanya.

NGiar.1 · ‎2023-08-22

I'm trying to make it work with RTEMS and the new STM32H7 HALs (v1.11.1). I've set up a project based upon the sample present on the GitHub page, for the Nucleo-H743ZI.

My lwipops.h options are the ones suggested from ST (I've tried also with a bigger MEM_SIZE):

#define MEM_SIZE (14 * 1024)

/* Relocate the LwIP RAM heap pointer. Place in SRAM3 */
#define LWIP_RAM_HEAP_POINTER (0x30004000)

/* ---------- Pbuf options ---------- */
/* PBUF_POOL_SIZE: the number of buffers in the pbuf pool.
   @ note: used to allocate Tx pbufs only */
#define PBUF_POOL_SIZE 8

/* PBUF_POOL_BUFSIZE: the size of each pbuf in the pbuf pool. */
#define PBUF_POOL_BUFSIZE 1536

/* LWIP_SUPPORT_CUSTOM_PBUF == 1: to pass directly MAC Rx buffers to the stack
   no copy is needed */
#define LWIP_SUPPORT_CUSTOM_PBUF 1

The variables are also where needed in memory:

ETH_DMADescTypeDef DMARxDscrTab[ETH_RX_DESC_CNT] __attribute__((section(".RxDecripSection"))); /* Ethernet Rx DMA Descriptors */
ETH_DMADescTypeDef DMATxDscrTab[ETH_TX_DESC_CNT] __attribute__((section(".TxDecripSection"))); /* Ethernet Tx DMA Descriptors */
LWIP_MEMPOOL_DECLARE(RX_POOL, ETH_RX_BUFFER_CNT, sizeof(RxBuff_t), "Zero-copy RX PBUF pool");
__attribute__((section(".RxArraySection"))) extern u8_t memp_memory_RX_POOL_base[];

.lwip_sec (NOLOAD) : {
    . = ABSOLUTE(0x30040000);
    *(.RxDecripSection) 
    
    . = ABSOLUTE(0x30040200);
    *(.TxDecripSection)
    
    . = ABSOLUTE(0x30040400);
    *(.RxArraySection) 
  } >SRAM_3
  /* Modification end */  
  /DISCARD/ :
  {
    libc.a ( * )
    libm.a ( * )
    libgcc.a ( * )
  }

The problem is that the program goes into an exception inside the mem_alloc function. The following is a backtrace taken from GDB:

#0  0x08000ff4 in mem_malloc ()
#1  0x08002ab4 in pbuf_alloc ()
#2  0x08009b8e in etharp_raw ()
#3  0x08009c84 in etharp_request_dst ()
#4  0x08009ca8 in etharp_request ()
#5  0x0800625a in netif_issue_reports ()
#6  0x080062e8 in netif_set_link_up ()
#7  0x0800f148 in low_level_init ()
#8  0x0800ef4e in ethernetif_init ()
#9  0x08005e3a in netif_add ()

_ARM_Exception_default (frame=0x2400b958 <_ISR_Stack_area_begin+3992>)

Can anyone help me understand what's wrong with this?

Blinti · ‎2023-09-21

In STM32F7 (Cortex-M7) my solution is:

when start configure the FREERTOS, select the CMSIS v1 (in my case v2 freeze, deadlock, I don't know what happening)
increase default task stack size to 256 words

And that's all, the lwip working reliable, and finally replying the ICMP (ping, echo) packets succesfully.
(In my case is: Nucleo-F756ZG, MCU: STM32F756ZGT6)

Any other config not needed, I mean enable the MPU, enable ICache, DCache, modify the ethernetif.c or lwip library files. So my conclusion is, I think the lwip middlewares not compatible yet the CMSIS v2 FREERTOS.

lavanya · ‎2023-09-27

Thank You @Blinti For Your Replay,

Can I know Which version of cube Mx you are using, For me Cube Mx 5.4 version ethernet stack is working but same configuration I tried for cube Mx version 6.8 it's not Working.

saikumar · ‎2024-05-13

can u send your ioc file