STM32 MCUs

I am into configuring a STM32H750VBT6 and I want to configure ETMv4 inside the code of the program and my objective is to detect and capture data on 5 trace pins.I configured all trace pipeline including, CSTF,ETF,ETM,DWT and TPIU. also I considered opening Locks, enabling TRCENA in CoreDebug_:DEMCR and enabling required clock domains in DBGMCU_CR.After all I am just sighting clock signal on TRACECLK pin. I also checked TPIU unit if it successfully outputs test patterns like AA55 and FF00. Test patterns worked properly but when disabling test pattern only clock comes out through the trace pins.I am looking for someone who configured that before to help me prevail it.here are my functions:#include "ETMv4.h"#include "core_cm7.h"uint32_t startAddr = 0;uint32_t stopAddr = 0;void Parallel_Trace_configure(){ TraceGPIO_Configure(); Disable_ETM(); TPIU_Configure(); ETF_Configure(); CSTF_Configure(); ETM_Configure(); SetupStartStopAddr(); DWT_Configure(); Enable_ETM();}void TPIU_Config

Hi everyone,I designed a board around the STM32G474 and I'm trying to use an external 24 MHz HSE crystal, but the crystal won't run under any configuration — the generated SystemClock_Config() call to HAL_RCC_OscConfig() returns HAL_ERROR and I land straight in Error_Handler() (infinite while(1) loop).Crystal I'm using:Manufacturer: Diodes Incorporated Part Number: FL2400159 Frequency: 24.0000 MHz Package: 3.2 x 2.5 mm, 4-pad ceramic SMD (Saronix-eCera FL series) Load Capacitance (CL): 18 pF ESR (Equivalent Series Resistance): 30 Ω Frequency Tolerance: ±10 ppm Frequency Stability: ±15 ppm Operating temperature: -40°C ~ +85°CLoad capacitor values I've tried (0603 package, X7R):22 pF 12 pF 28 pFSame result with all three: error. Based on the load capacitance formula (Cext = 2×(CL − Cstray), assuming Cstray ≈ 3-5pF), 28pF should be the closest to ideal, but even that didn't work.What I've checked/done so far:CubeIDE → RCC → High Speed Clock (HSE) is set to "Crystal/Ceramic Resonator" (not

I am experiencing a critical issue with the hardware video encoder (VENC) on the STM32N6 when processing low-light frames.Setup: Sensor: IMX335 connected to STM32N6 Capture Pipeline: DCMIPP configured in 1080p@15FPS capturing and writing to RAM in RGB565 format. Encoder Input: The same RGB565 buffers are passed to the VENC. Storage: The encoded H.264 stream is saved directly to an SD card. The Problem:When the camera enters a dark environment (very low-light conditions) and I manually reduce the Gain/Exposure to very low values (where the image should be almost completely black), the video recorded on the SD card starts to progressively brighten up until it becomes completely white (a "flashbang" effect).When playing back the file on a PC, the transition from black to fully white takes about 1-2 seconds (accumulating over several frames).Key Observations & What I've Already Tested: DCMIPP Output is OK: I have a live preview on an LCD screen displaying the input buffers direct

Hi all,I'm designing the control electronics for an automatic egg-candling machine (150 positions). An STM32F411 drives everything over a single shared SPI bus:A 74HC595 daisy-chain (shift registers → ULN2803A → solenoid valves) MCP3208 ADCs (reading LDR light sensors) on the same SPI bus, CS-selectedThe process is strictly sequential (read all sensors first, then actuate valves — never at the same time), so valve-switching noise never coincides with an ADC read, and SPI speed is not time-critical. That's why I want to keep the clock slow.Physical signal path (my concern):~100 cm total PCB trace 2 board-to-board connectors (PCB-to-PCB) then a 20 cm cable that enters the target IC (74HC595 / MCP3208) Planned SPI clock: 100 kHz, SPI mode 0, 3.3 V logicMitigations planned: series termination on SCLK/MOSI/LATCH at the source, ground interleaving in the cable, star grounding (valve PGND separated from SPI/logic GND), local 3.3 V regulation at the far end.My own bench test: I ran an SPI loop

Dear STM Support Team,We are currently developing a rear-view camera application on the STM32N6570 platform. Our existing implementation was developed using the Sony IMX335 image sensor, and we are now planning to migrate the design to a custom board using the OmniVision OV2312 sensor.We would like to clarify the following: Does the existing STM32N6570 camera driver framework support the OV2312 sensor directly? If not, is there an official OV2312 sensor driver available from ST? Can the existing IMX335 driver be adapted for OV2312, or is a separate sensor-specific driver required? If an OV2312 driver is already available, could you please provide the driver package, reference code, or the relevant documentation for integration with the STM32N6570 imaging pipeline? Your clarification will help us proceed with the custom hardware integration and software development.Thank you for your support, and we look forward to your response.

Hello Friends, I have selected STM32F401XE series for my new project. The device is expected to face road vibrations and shocks, so to make system more reliable I am thinking to use MEMS oscillator rather than standard Quartz Crystal. I tried to search any reference schematic of STM32 MCU having MEMS osciilator but couldn’t find. Please share if any information available on how to use MEMS Oscillator.  I understand  OSC-IN should be connected to OUT of MEMS Oscillator and OSC-OUT should be set to high -Z.   What about VDD of MEMS Oscillator?  Should it be set to same VDD as set in STM32F401XE MCU, which is 3.3V Thanks

Hi Team, I was going through the schematics of STEVAL-CTM010V1 solution for dual Motor controller application for Airconditioner.  Can anyone help me regarding the design equations of this application? If possible, we are ready for a meeting.Kindly reply. Thanks and Regards,Ajay P

Hello I’m developing long project.Tomorrow I open the project and try to save it without any modification,but appears this window  Can someone please help me, thankyou in advance.

Hello ST team,I am designing a circuit using the STM32N657 and want to minimise the total power consumption in this application. therefore, I am considering using the ultra-low-power U031 MCU to switch the STM32N6 on and off via this MCU. My question is: can I use a power switch instead of an LDO?I have attached my power tree I’d appreciate it if you could have a look.Regards  

Hi everyone,I am trying to generate a professional SBOM for my project.I have a few questions regarding the best workflow:Tooling & Detection: What the best tool to generate the SBOM.I tried using ScanCode, but it didn't find any component in my project (e.g., FreeRTOS). I had to manually add .about files to the folder to get results. Is there a better tool that can generate the SBOM with minimal manual intervention?ST Cube SBOM : The Cube MCU packages contain dozens of libraries (FatFS, FreeRTOS, USB_Host, etc.). If my project only uses FatFS, the package JSON still lists everything. Do I have to manually extract the components I use from the ST JSON? how to get use of the ST SBOM?I’d love to hear if anyone has a script or a specific toolchain that automates this without the manual "copy-paste" from the ST manifests Thank you!Yahya  

Hello,I am using an STM32L431 as an I2C Slave and an RL78/G13 as an I2C Master.I am trying to transmit data from the STM32L431 (Slave) to the Renesas RL78 (Master).When the RL78 performs an I2C read operation, the following callback sequence is observed on the STM32: 1 HAL_I2C_AddrCallback(Direction = Read) 2 HAL_I2C_ErrorCallback(ErrorCode = 4) 3 HAL_I2C_ListenCpltCallback()Inside the AddrCallback I start the transmission using: HAL_I2C_Slave_Seq_Transmit_IT(hi2c, tx_buffer, tx_length, I2C_FIRST_AND_LAST_FRAME);The function returns HAL_OK.The transmit buffer contains a simple incrementing pattern, length 20 byte: 01 02 03 04 05The STM32 reports that transmission has completed: XferSize = 20 XferCount = 0However, immediately afterwards the ErrorCallback is called with: TextErrorCode = 4According to stm32l4xx_hal_i2c.h this corresponds to: HAL_I2C_ERROR_AF (Acknowledge failure / NACK).On the RL78 side, the receive buffer does not contain the transmitted data. Expected: 01 02 03 04 05 ..

I am using 4 HRTIM PWM outputs(CHA1/A2 and CHB1/B2) on the STM32G474 MCU to control a full-bridge converter. I want a delayed version of the PWM on CH1A using another advanced/basic timer. Can the HRTIM generate a software interrupt which can be used by another advanced/basic timer for a delayed/phase shifted PWM output? I do NOT want to use another timer from the HRTIM module as they are reserved for other purposes.  

Hi there !I have a quick question about where the data are save. If i create one const array [1024] the data inside the array (because i write the word const in front) are save inside the falsh ? and this give to me more space in the ram  right ? and is the same if i create one struct and i acces with pointer ?  and please some one can help me and show where i can find all this kind of information like book tutorial website youtube ectThank you Sergio

My problem: my SPI2 module doesn’t appear to be clocking in data even if it is configured a full duplex master.Context:I am developing the firmware on a board that some other team designed and they picked PB13 (SCK), PB14 (MISO) and PB15 (MOSI) to implement SPI2.  I am aware of the fact that those pins are shared with the UCPD dead battery detection feature and that:Dead battery detection must be disabled Clock rate of SPI is limited to ~3MBdI am developing my drivers bare-metal (no LL or HAL), but since I couldn’t figure out how to make this work, I decided to try with the HAL code generated by STM32CubeMX.I created a new project on that software with software package v1.7.0 which appears to be the latest at this time.I simply configured the clock tree to use HSI (64MHz) → /2 → PLL1 (M=4, N=24, Q=4) = 48MHz.  I then use SPI2 prescaler to get 1.5Mbd out of PLL1Q (I tried lower data rate too).  The SPI module is configured in full duplex.  Here is the main function code after HAL initia

Dear Community, I’m struggling to find a way to prevent SMDCube IDE code generation to overwrite a changed #define. I’ve tried the usual wrapping with /* USER CODE BEGIN …   with no result, and also try to dig online for some similar issue, but no luck.Any hint on how I can actually make this work? Details:STM32U595STM32CubeIDE Version: 1.19.0 specific define ( in STM32U5xx_HAL_CONF )#define USE_HAL_ADC_REGISTER_CALLBACKS 1U /* ADC register callback disabled */this one is overwritten each time code generation is run from the graphic GUI Goal is to have ADC complete callback registrable to multiple functions. When I force the above define to 1, all works as expected, but when I have to run code generation then the define is rolled back to the standard “0U”, which obviously is not desirable.Tried also to override the define from outside the file, but this creates a neverending chain of errors. Best Regards,Anton 

Dear ST Team,We would like to request the design files and technical documentation for the STEVAL-ISD01KCB – 22 kW High-End Servo Drive SIL2 Reference Design for evaluation and reference purposes.Kindly share the available design package, including schematics, PCB layout files, BOM, Gerber files, firmware/software package, hardware architecture documentation, technical specification, safety assessment documents, STO (Safe Torque Off) and SBC (Safe Brake Control) implementation details, TÜV safety documentation, and any other related technical documents.If access to these materials requires an NDA, please let us know the process for obtaining access.We appreciate your support and look forward to your response.Best Regards,Maryam

First i'll say what i have. I have folders name 34,35,37,38,39,42. Inside it has images adn every folder images start with 0. I have a folder name DWIN_SET. So inside that DWIN_SET it has 22_Config.bin,14ShowFile.bin, 13TouchFile.bin,32 icon library these are generated by me few mins back. Remaining files are old files which is already present. What i did is Open the DGUS software. and open .hmi which is present outside the DWIN_SET. after opening it shows a list of 6 images, among that first image is different, it is inbuilt someone kept that order, i didn;t change anything on this. I opened a folder named image, inside it has 32,34,35,37,38,39,42 folders and has some images on it . What i did open the 32 folder in ICL generator tool. Here i try to remove only one image which 0.png and replace it with another image present in different folder, but it failed. If i change one image remaining all iages also lost. So what i did is replace the image in the folder and then open it in icl to

 I am working with an STM32F0 device and I want to implement a firmware update mechanism.My current plan is to split the internal flash into three regions:Bootloader: 0x08000000Application Slot 1 (App1): 0x08004000Application Slot 2 (App2): 0x08008000The bootloader always runs first.Only one application slot is active at a time.The update flow is planned as follows:If App1 is currently running and a new firmware update arrives, the new firmware is written to App2.If App2 is running, the new firmware is written to App1.After the update, the bootloader selects which slot to boot.My concern is about the linker script (.ld) configuration:When I build a new application firmware, I set the flash origin address in the linker script to:  FLASH (rx) : ORIGIN = 0x08004000This works correctly when the firmware is programmed into App1.However, if the same binary is written to App2 at address 0x08008000, the vector table, reset handler, and absolute addresses inside the firmware will

Hello,I downloaded STM32CubeN6-main FW 1.4.0 from GitHub and am trying to build the Nx_WebServer FSBL example.  I am getting this error message:11:26:53 **** Build of configuration Debug for project Nx_WebServer_FSBL ****make -j16 all make: *** No rule to make target 'C:/STM_FW/STM32CubeN6-main/Middlewares/ST/threadx/common/src/tx_block_pool_performance_info_get.c', needed by 'Middlewares/threadx/Performance/tx_block_pool_performance_info_get.o'. Stop."make -j16 all" terminated with exit code 2. Build might be incomplete.11:26:55 Build Failed. 1 errors, 0 warnings. (took 2s.214ms)I don’t see any source code at the C:\STM_FW\STM32CubeN6-main\Middlewares\ST\threadx location, is there another project I need to build first?

I’ve been trying to adapt the code from the STM32WB5MM-DK QSPI_ReadWrite_IT example to a Renesas part. However, I have not been able to get it into Quad mode. For this part I need to write 0x02 into register 0x31 as I understand the data sheet.From monitoring the status register I can see that the write enable bit gets set and cleared, but the QE (quad enable) bit doesn’t get set.Also, in reviewing the code for the DK, I don’t see code to set the quad enable bit as per the Infineon S25FL128S data sheet.In searching the support forums, I see references to a routine called QSPI_QuadEnable, but I have not been able to find corresponding code.I’m obviously missing something. Can someone point me in the right direction - either specific to this board or a more generic solution?Thanks

Hello, everyone on the forum.I'm building a system using the STM32H735G-DK, ThreadX, and NetX Duo.I'm writing logs to a microSD card to keep a record of the system's operation.I integrated FTP into the system so that log files can be downloaded via Ethernet.Since the FTP download speed is only about 150 kilobytes per second, it takes a long time to download large log files.Currently, `nx_ftp_server_create` allocates an 8K-byte stack for the FTP server. What are some ways to increase FTP download speeds?I would appreciate any advice. 

I was learning about how the PLLs work on the H7RS boards, and I discovered a small inconsistency in the RCC_PLLCFGR register. On page 440 and 442 of the RM0477, PLL2FRACEN is incorrectly written down as PLL2FRACLEN (including the ‘L’ near the end). I’ve confirmed that this is incorrect by looking at the HAL and seeing it’s consistently defined as PLL2FRACEN in code (without the ‘L’) inside of stm32h7s3xx.h. Searching for the version with the ‘L’ returned no results, so I’ve concluded that this must be a typo in the reference manual. Could you confirm this is a documentation typo?

I am trying to establish communication between an STM32F446ZCH6 and a LAN9253 using the Quad SPI (QSPI) interface on our custom hardware.As an initial validation, I am attempting to read the following LAN9253 registers: BYTE_TEST register (0x64) ID_REV (Chip ID) register (0x50) However, I am not receive the expected register values. Instead, the values returned are consistently 0x88888888 or 0xFFFFFFFF.To troubleshoot the issue, I captured the SPI/QSPI communication using a logic analyzer. From the waveforms, it appears that: The STM32 (master) is transmitting the read command correctly. The clock (SCK) and chip select (CS) signals appear normal. However, the LAN9253 does not respond with valid data, and the STM32 does not receive any meaningful data from the slave. We also attempted communication using: Single SPI (1-bit mode) Dual SPI (2-bit mode) Quad SPI (4-bit mode) Unfortunately, the behavior is the same in all three modes, with no valid response from the LAN9253.We hav

Hi ST Support Team,              I am Yashwanth Melwanki, Associated with Quest-Global as Technical Architect.               In one of designs [WIP], we are considering NUCLEO-H755ZI-Q and have connected below Peripherals placed on seperate board. connection is through MROPH headers CN11 and CN12.               All these peripherals will be active and set to run at max speed to the interfaces they are conencted to STM [I2C / SPI / USB / eMMS etc]              I wish to know, What is capacibility of STM32 to run and interact with these peripharals engaged at max speed?                             1. x1 USB FS to USB hub controller              2. x1 I2c to 2 GPIO expanders (24 bit each - one as GPO and Anlother as GPI)              3. x1 I2C to 1 GPIO expander, dedicated as 24Bit GPI              4. x1 Ethernet              5. x2 SPI: One for DAC (16bit, 16 Channel) interface and Another for ADC (16bit, 16 Channel) interface              6. x1 QSPI              7. x2 I2S; One as Inout a

I am using the ST67W611 Wi-Fi module with the ST67 W6X SDK to implement an HTTP web server.While profiling the performance, I observed that every call to W6X_Net_Send() takes approximately 391 ms (or more) regardless of the amount of data being transmitted. Test SetupModule: ST67W611 Interface: SPI Transport: TCP Firmware: 1.1.1 SDK Version : 2.0.89 MCU: STM32F4  QuestionsIs a fixed delay of approximately 391 ms per W6X_Net_Send() call expected? Is W6X_Net_Send() internally waiting for a TCP ACK or another event before returning? Is there any configurable transmit timeout or buffering mechanism that affects this behavior? Is there a recommended maximum chunk size for W6X_Net_Send() to improve throughput? Are there any SDK or firmware settings that can reduce this latency?Any guidance would be greatly appreciated.Thank you.