Question
2x octal PSRAM on one XSPI port via EXTENDMEM (128 MB total)
I need more PSRAM and so went exploring and found RM0486, which seems to show that I can have two PSRAM on one XSPI port (using EXTENDMEM, §28.4.24), but I cant seem to find more than that.
- Is EXTENDMEM with two octal DDR PSRAMs a silicon-validated configuration on the N6 XSPI, or is it documented-but-untested territory?
- RM0486 notes the automatic CS switch when an access "crosses the middle boundary of the external memory". Does this work transparently with DTR memory-mapped writes and MDMA/DMA bursts, or are there alignment/burst-length restrictions at the boundary I should design around?
- Has anyone run 128 MB total on one N6 XSPI port? The 256 MB address window and DEVSIZE math allow it, but I'd love to hear from someone who has it working on real hardware (or from ST whether an eval/reference design exists with dual PSRAM).
- Anything to watch on the RIF/RISAF side for the XSPI1 memory region when all masters run secure?
Board: custom using the STM32N657X0HxQ.
Planned setup:
- Two identical AP Memory APS51208N (512 Mbit, x8 Xccela octal DDR PSRAM, 200 MHz) on XSPIM Port 1, sharing the 8-bit data bus, CLK and DQS
- Chip 1 on XSPIM_P1_NCS1 (PO0), chip 2 on XSPIM_P1_NCS2 (PO1)
- EXTENDMEM = 1 (XSPI_DCR1 bit 21, RM0486 §28.4.24) so the two dies appear as one contiguous 128 MB memory-mapped region at 0x90000000, with hardware switching chip-select at the 64 MB boundary
- Use case: memory-mapped read/write + DMA (camera frame buffering), no XiP from PSRAM
