2x octal PSRAM on one XSPI port via EXTENDMEM (128 MB total)

[edenraf]

I need more PSRAM and so went exploring and found RM0486, which seems to show that I can have two PSRAM on one XSPI port (using EXTENDMEM, §28.4.24), but I cant seem to find more than that.

1. Is EXTENDMEM with two octal DDR PSRAMs a silicon-validated configuration on the N6 XSPI, or is it documented-but-untested territory? 

2. RM0486 notes the automatic CS switch when an access "crosses the middle boundary of the external memory". Does this work transparently with DTR memory-mapped writes and MDMA/DMA bursts, or are there alignment/burst-length restrictions at the boundary I should design around?

3. Has anyone run 128 MB total on one N6 XSPI port? The 256 MB address window and DEVSIZE math allow it, but I'd love to hear from someone who has it working on real hardware (or from ST whether an eval/reference design exists with dual PSRAM).

4. Anything to watch on the RIF/RISAF side for the XSPI1 memory region when all masters run secure?

Board: custom using the STM32N657X0HxQ.

Planned setup:

• Two identical AP Memory APS51208N (512 Mbit, x8 Xccela octal DDR PSRAM, 200 MHz) on XSPIM Port 1, sharing the 8-bit data bus, CLK and DQS
• Chip 1 on XSPIM_P1_NCS1 (PO0), chip 2 on XSPIM_P1_NCS2 (PO1)
• EXTENDMEM = 1 (XSPI_DCR1 bit 21, RM0486 §28.4.24) so the two dies appear as one contiguous 128 MB memory-mapped region at 0x90000000, with hardware switching chip-select at the 64 MB boundary
• Use case: memory-mapped read/write + DMA (camera frame buffering), no XiP from PSRAM

[KDJEM.1]

Hello ​@edenraf ;

 

Do you get an issue when two octal DDR PSRAM is configured? if yes please share the issue.

For the second question, it  works. To avoid a burst crossing the middle of the external memory size because as we need to target the second memory, you need to restart a communication with the other memory and restart the command address phase for that.

NO ST hardware is available for two octal DDR.

 

Thank you.

Kaouthar

 

 

[edenraf]

Hi, sorry for the late reply.

I've now configured it in CubeMX (STM32N657X0HxQ, FSBL context) and want to verify my understanding before committing the PCB layout, since there's no ST reference hardware for two octal DDR PSRAMs.

Points I need confirmation with:

1. EXTENDMEM is not exposed in the CubeMX GUI:  there's no dual-memory/extended-memory checkbox in the XSPI1 panel. I'm setting it manually in the FSBL after MX_XSPI1_Init(): XSPI1->DCR1 |= (1U << 21). Is that the intended way, or is there a CubeMX toggle I'm missing?
2. NCS2 pin — CubeMX only reserves NCS1 from the config panel (its model is single-die). I can manually assign XSPIM_P1_NCS2 to the pin, but it shows as "unused" (orange). Is manually muxing the NCS2 pin the correct/expected approach, and will the hardware drive it correctly once EXTENDMEM is set? or does NCS2 require anything beyond the pin AF?
3. DEVSIZE = per-die (512 Mbit), not total (1 Gbit) - can you confirm this is correct for EXTENDMEM mode?
4. I understand EXTENDMEM (DCR1 bit 21) and Dual-memory mode / DMM (CR bit 6) are mutually exclusive, and I'm using EXTENDMEM, not DMM. Correct?

My configuration: single XSPI1 instance, XSPIM in Direct mode (XSPI1 set to Port1), two APS51208N (512 Mb, x8) octal-DDR PSRAMs sharing Port 1:

- Mode: Octo SPI, Port1 Octo
- Memory Type: AP Memory
- Memory Size: 512 Mbit i.e. DEVSIZE = the size of one die, per RM0486 §28.4.24 ("The size of one external memory must be set in the DEVSIZE bitfield"). The hardware then maps NCS1 to [base : base+2^DEVSIZE-1] and NCS2 to the next 2^DEVSIZE, giving a contiguous 128 MB.
- Chip Select Boundary: 64 MB - to prevent any burst straddling the die seam (the "restart command/address phase" you described). I understand the CS switch itself is automatic at the middle boundary.

 

Thanks for any additional help

[KDJEM.1]

Hello ​@edenraf ;

 

You're posting new questions, please start a new post for any additional questions instead of adding them to the same conversation.

 

Thank you.

Kaouthar

[edenraf]

No worries. I have created a new post. Hopefully I could get some help there. Thanks