STM32N6 XSPIM multiplexed memory configurations

[Golgepapaz]

 

Does the STM32N6 XSPIM permit multiplexed mode with different memory types on the two instances? XSPIM_CR.MUXEN=1, mode = multiplexed to Port 2, with XSPI1 as MTYP=101 (HyperBus) driving a HyperRAM on NCS2, and XSPI2 as Quad SPI driving a NOR on NCS1.

CubeMX 6.18 refuses it requiring both modes to be same but RM0486 reference manual makes no such distinction or state no restriction on memory types. Which one is authoritative? Can I mix them ? 

If mixed types are legal, are there constraints on  DQS/RWDS and CLK/NCLK when only one instance uses them (NOR does not connect to NCLK for example)?

 

 

 

 

[KDJEM.1]

Hello ​@Golgepapaz and welcome to the community;

 

I confirm that there should be no problem using different memory type with multiplexed mode.

I reported the STM32CubeMx issue internally.

For this configuration, each instance has its own block delay, so you have to be careful with the calibration.

This should be done separately during the initialization phase of each instance before switching to multiplexed mode.

 

Internal ticket number CDM0064970 (This is an internal tracking number and is not accessible or usable by customers).

 

Thank you.

Kaouthar